po 20. 1. 2020 v 9:48 odesÃlatel Michal Simek <[email protected]> napsal: > > From: T Karthik Reddy <[email protected]> > > Fixed wrong enumeration of nand_config structure. Added chip select > function before reading the nand chip for maf/dev id's, without this > unable to access id's from some of the micron chips. Also added a > print statement to identify if a nand flash is using on-die ecc. > > Signed-off-by: T Karthik Reddy <[email protected]> > Signed-off-by: Michal Simek <[email protected]> > --- > > drivers/mtd/nand/raw/arasan_nfc.c | 11 ++++++++--- > 1 file changed, 8 insertions(+), 3 deletions(-) > > diff --git a/drivers/mtd/nand/raw/arasan_nfc.c > b/drivers/mtd/nand/raw/arasan_nfc.c > index d1b1a4263a2e..110c32b39616 100644 > --- a/drivers/mtd/nand/raw/arasan_nfc.c > +++ b/drivers/mtd/nand/raw/arasan_nfc.c > @@ -1120,12 +1120,15 @@ static void arasan_nand_cmd_function(struct mtd_info > *mtd, unsigned int command, > static void arasan_check_ondie(struct mtd_info *mtd) > { > struct nand_chip *nand_chip = mtd_to_nand(mtd); > - struct nand_config *nand = nand_get_controller_data(nand_chip); > + struct nand_drv *info = nand_get_controller_data(nand_chip); > + struct nand_config *nand = &info->config; > u8 maf_id, dev_id; > u8 get_feature[4]; > u8 set_feature[4] = {ENABLE_ONDIE_ECC, 0x00, 0x00, 0x00}; > u32 i; > > + nand_chip->select_chip(mtd, 0); > + > /* Send the command for reading device ID */ > nand_chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); > nand_chip->cmdfunc(mtd, NAND_CMD_READID, 0, -1); > @@ -1150,10 +1153,12 @@ static void arasan_check_ondie(struct mtd_info *mtd) > for (i = 0; i < 4; i++) > get_feature[i] = nand_chip->read_byte(mtd); > > - if (get_feature[0] & ENABLE_ONDIE_ECC) > + if (get_feature[0] & ENABLE_ONDIE_ECC) { > nand->on_die_ecc_enabled = true; > - else > + printf("On-DIE ECC Enabled\n"); > + } else { > printf("%s: Unable to enable OnDie ECC\n", __func__); > + } > > /* Use the BBT pattern descriptors */ > nand_chip->bbt_td = &bbt_main_descr; > -- > 2.25.0 >
Applied. M -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs

