On Mon, Mar 23, 2020 at 3:45 AM Marek Vasut <[email protected]> wrote:
>
> Currently the code only flushes the first RX descriptor, not every entry
> in the RX descriptor ring. Fix this, to make sure the DMA engine can pick
> the RX descriptors correctly.
>
> Signed-off-by: Marek Vasut <[email protected]>
> Cc: Joe Hershberger <[email protected]>
> Cc: Patrice Chotard <[email protected]>
> Cc: Patrick Delaunay <[email protected]>
> Cc: Ramon Fried <[email protected]>
> Cc: Stephen Warren <[email protected]>
> ---
> drivers/net/dwc_eth_qos.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
> index c4f665bda9..66cc301c8c 100644
> --- a/drivers/net/dwc_eth_qos.c
> +++ b/drivers/net/dwc_eth_qos.c
> @@ -1243,8 +1243,8 @@ static int eqos_start(struct udevice *dev)
> rx_desc->des0 = (u32)(ulong)(eqos->rx_dma_buf +
> (i * EQOS_MAX_PACKET_SIZE));
> rx_desc->des3 = EQOS_DESC3_OWN | EQOS_DESC3_BUF1V;
> + eqos->config->ops->eqos_flush_desc(rx_desc);
> }
> - eqos->config->ops->eqos_flush_desc(eqos->descs);
>
> writel(0, &eqos->dma_regs->ch0_txdesc_list_haddress);
> writel((ulong)eqos->tx_descs,
> &eqos->dma_regs->ch0_txdesc_list_address);
> --
> 2.25.1
>
Reviewed-by: Ramon Fried <[email protected]>
