On 19/10/20 10:16 pm, Dario Binacchi wrote:
> Add drivers/clk/ti/ folder and move all TI's code in this folder for
> better maintenance.
>
> Signed-off-by: Dario Binacchi <dario...@libero.it>
> ---
>
> (no changes since v1)
>
> drivers/clk/Kconfig | 40 +-----------------
> drivers/clk/Makefile | 8 +---
> drivers/clk/ti/Kconfig | 42 +++++++++++++++++++
> drivers/clk/ti/Makefile | 12 ++++++
> .../clk-am3-dpll-x2.c} | 0
> .../{clk-ti-am3-dpll.c => ti/clk-am3-dpll.c} | 0
> drivers/clk/{clk-ti-ctrl.c => ti/clk-ctrl.c} | 0
> .../{clk-ti-divider.c => ti/clk-divider.c} | 2 +-
> drivers/clk/{clk-ti-gate.c => ti/clk-gate.c} | 0
> drivers/clk/{clk-ti-mux.c => ti/clk-mux.c} | 2 +-
> drivers/clk/{clk-ti-sci.c => ti/clk-sci.c} | 0
> drivers/clk/{clk-ti.c => ti/clk.c} | 2 +-
> drivers/clk/{clk-ti.h => ti/clk.h} | 0
> 13 files changed, 59 insertions(+), 49 deletions(-)
> create mode 100644 drivers/clk/ti/Kconfig
> create mode 100644 drivers/clk/ti/Makefile
> rename drivers/clk/{clk-ti-am3-dpll-x2.c => ti/clk-am3-dpll-x2.c} (100%)
> rename drivers/clk/{clk-ti-am3-dpll.c => ti/clk-am3-dpll.c} (100%)
> rename drivers/clk/{clk-ti-ctrl.c => ti/clk-ctrl.c} (100%)
> rename drivers/clk/{clk-ti-divider.c => ti/clk-divider.c} (99%)
> rename drivers/clk/{clk-ti-gate.c => ti/clk-gate.c} (100%)
> rename drivers/clk/{clk-ti-mux.c => ti/clk-mux.c} (99%)
> rename drivers/clk/{clk-ti-sci.c => ti/clk-sci.c} (100%)
> rename drivers/clk/{clk-ti.c => ti/clk.c} (96%)
> rename drivers/clk/{clk-ti.h => ti/clk.h} (100%)
Why don't we start adding the drivers directly unders drivers/clk/ti folder.
IMHO, it did not make sense to add drivers in drivers/clk and then move them to
drivers/clk/ti in the same series. I understand clk-to-sci.c. Movement of
clk-ti-sci.c can be a separate patch.
Thanks and regards,
Lokesh
>
> diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
> index f383e295d3..99b1254de6 100644
> --- a/drivers/clk/Kconfig
> +++ b/drivers/clk/Kconfig
> @@ -98,45 +98,6 @@ config CLK_STM32F
> This clock driver adds support for RCC clock management
> for STM32F4 and STM32F7 SoCs.
>
> -config CLK_TI_AM3_DPLL
> - bool "TI AM33XX Digital Phase-Locked Loop (DPLL) clock drivers"
> - depends on CLK && OF_CONTROL
> - help
> - This enables the DPLL clock drivers support on AM33XX SoCs. The DPLL
> - provides all interface clocks and functional clocks to the processor.
> -
> -config CLK_TI_CTRL
> - bool "TI OMAP4 clock controller"
> - depends on CLK && OF_CONTROL
> - help
> - This enables the clock controller driver support on TI's SoCs.
> -
> -config CLK_TI_DIVIDER
> - bool "TI divider clock driver"
> - depends on CLK && OF_CONTROL && CLK_CCF
> - help
> - This enables the divider clock driver support on TI's SoCs.
> -
> -config CLK_TI_GATE
> - bool "TI gate clock driver"
> - depends on CLK && OF_CONTROL
> - help
> - This enables the gate clock driver support on TI's SoCs.
> -
> -config CLK_TI_MUX
> - bool "TI mux clock driver"
> - depends on CLK && OF_CONTROL && CLK_CCF
> - help
> - This enables the mux clock driver support on TI's SoCs.
> -
> -config CLK_TI_SCI
> - bool "TI System Control Interface (TI SCI) clock driver"
> - depends on CLK && TI_SCI_PROTOCOL && OF_CONTROL
> - help
> - This enables the clock driver support over TI System Control Interface
> - available on some new TI's SoCs. If you wish to use clock resources
> - managed by the TI System Controller, say Y here. Otherwise, say N.
> -
> config CLK_HSDK
> bool "Enable cgu clock driver for HSDK boards"
> depends on CLK && TARGET_HSDK
> @@ -209,6 +170,7 @@ source "drivers/clk/owl/Kconfig"
> source "drivers/clk/renesas/Kconfig"
> source "drivers/clk/sunxi/Kconfig"
> source "drivers/clk/sifive/Kconfig"
> +source "drivers/clk/ti/Kconfig"
> source "drivers/clk/tegra/Kconfig"
> source "drivers/clk/uniphier/Kconfig"
>
> diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
> index c98aa27e71..848cfd46f5 100644
> --- a/drivers/clk/Makefile
> +++ b/drivers/clk/Makefile
> @@ -13,12 +13,12 @@ obj-$(CONFIG_$(SPL_TPL_)CLK_COMPOSITE_CCF) +=
> clk-composite.o
>
> obj-y += analogbits/
> obj-y += imx/
> +obj-y += ti/
> obj-y += tegra/
> obj-$(CONFIG_ARCH_ASPEED) += aspeed/
> obj-$(CONFIG_ARCH_MEDIATEK) += mediatek/
> obj-$(CONFIG_ARCH_MTMIPS) += mtmips/
> obj-$(CONFIG_ARCH_MESON) += meson/
> -obj-$(CONFIG_ARCH_OMAP2PLUS) += clk-ti.o
> obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
> obj-$(CONFIG_ARCH_SOCFPGA) += altera/
> obj-$(CONFIG_CLK_AT91) += at91/
> @@ -48,11 +48,5 @@ obj-$(CONFIG_SANDBOX) += clk_sandbox.o
> obj-$(CONFIG_SANDBOX) += clk_sandbox_test.o
> obj-$(CONFIG_SANDBOX_CLK_CCF) += clk_sandbox_ccf.o
> obj-$(CONFIG_STM32H7) += clk_stm32h7.o
> -obj-$(CONFIG_CLK_TI_AM3_DPLL) += clk-ti-am3-dpll.o clk-ti-am3-dpll-x2.o
> -obj-$(CONFIG_CLK_TI_CTRL) += clk-ti-ctrl.o
> -obj-$(CONFIG_CLK_TI_DIVIDER) += clk-ti-divider.o
> -obj-$(CONFIG_CLK_TI_GATE) += clk-ti-gate.o
> -obj-$(CONFIG_CLK_TI_MUX) += clk-ti-mux.o
> -obj-$(CONFIG_CLK_TI_SCI) += clk-ti-sci.o
> obj-$(CONFIG_CLK_VERSAL) += clk_versal.o
> obj-$(CONFIG_CLK_CDCE9XX) += clk-cdce9xx.o
> diff --git a/drivers/clk/ti/Kconfig b/drivers/clk/ti/Kconfig
> new file mode 100644
> index 0000000000..3c61046728
> --- /dev/null
> +++ b/drivers/clk/ti/Kconfig
> @@ -0,0 +1,42 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +# Copyright (C) 2020 Dario Binacchi <dario...@libero.it>
> +#
> +config CLK_TI_AM3_DPLL
> + bool "TI AM33XX Digital Phase-Locked Loop (DPLL) clock drivers"
> + depends on CLK && OF_CONTROL
> + help
> + This enables the DPLL clock drivers support on AM33XX SoCs. The DPLL
> + provides all interface clocks and functional clocks to the processor.
> +
> +config CLK_TI_CTRL
> + bool "TI OMAP4 clock controller"
> + depends on CLK && OF_CONTROL
> + help
> + This enables the clock controller driver support on TI's SoCs.
> +
> +config CLK_TI_DIVIDER
> + bool "TI divider clock driver"
> + depends on CLK && OF_CONTROL && CLK_CCF
> + help
> + This enables the divider clock driver support on TI's SoCs.
> +
> +config CLK_TI_GATE
> + bool "TI gate clock driver"
> + depends on CLK && OF_CONTROL
> + help
> + This enables the gate clock driver support on TI's SoCs.
> +
> +config CLK_TI_MUX
> + bool "TI mux clock driver"
> + depends on CLK && OF_CONTROL && CLK_CCF
> + help
> + This enables the mux clock driver support on TI's SoCs.
> +
> +config CLK_TI_SCI
> + bool "TI System Control Interface (TI SCI) clock driver"
> + depends on CLK && TI_SCI_PROTOCOL && OF_CONTROL
> + help
> + This enables the clock driver support over TI System Control Interface
> + available on some new TI's SoCs. If you wish to use clock resources
> + managed by the TI System Controller, say Y here. Otherwise, say N.
> diff --git a/drivers/clk/ti/Makefile b/drivers/clk/ti/Makefile
> new file mode 100644
> index 0000000000..a279a2838d
> --- /dev/null
> +++ b/drivers/clk/ti/Makefile
> @@ -0,0 +1,12 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +# Copyright (C) 2020 Dario Binacchi <dario...@libero.it>
> +#
> +
> +obj-$(CONFIG_ARCH_OMAP2PLUS) += clk.o
> +obj-$(CONFIG_CLK_TI_AM3_DPLL) += clk-am3-dpll.o clk-am3-dpll-x2.o
> +obj-$(CONFIG_CLK_TI_CTRL) += clk-ctrl.o
> +obj-$(CONFIG_CLK_TI_DIVIDER) += clk-divider.o
> +obj-$(CONFIG_CLK_TI_GATE) += clk-gate.o
> +obj-$(CONFIG_CLK_TI_MUX) += clk-mux.o
> +obj-$(CONFIG_CLK_TI_SCI) += clk-sci.o
> diff --git a/drivers/clk/clk-ti-am3-dpll-x2.c
> b/drivers/clk/ti/clk-am3-dpll-x2.c
> similarity index 100%
> rename from drivers/clk/clk-ti-am3-dpll-x2.c
> rename to drivers/clk/ti/clk-am3-dpll-x2.c
> diff --git a/drivers/clk/clk-ti-am3-dpll.c b/drivers/clk/ti/clk-am3-dpll.c
> similarity index 100%
> rename from drivers/clk/clk-ti-am3-dpll.c
> rename to drivers/clk/ti/clk-am3-dpll.c
> diff --git a/drivers/clk/clk-ti-ctrl.c b/drivers/clk/ti/clk-ctrl.c
> similarity index 100%
> rename from drivers/clk/clk-ti-ctrl.c
> rename to drivers/clk/ti/clk-ctrl.c
> diff --git a/drivers/clk/clk-ti-divider.c b/drivers/clk/ti/clk-divider.c
> similarity index 99%
> rename from drivers/clk/clk-ti-divider.c
> rename to drivers/clk/ti/clk-divider.c
> index cb6923ddb5..d448197b1f 100644
> --- a/drivers/clk/clk-ti-divider.c
> +++ b/drivers/clk/ti/clk-divider.c
> @@ -17,7 +17,7 @@
> #include <linux/clk-provider.h>
> #include <linux/kernel.h>
> #include <linux/log2.h>
> -#include "clk-ti.h"
> +#include "clk.h"
>
> /*
> * The reverse of DIV_ROUND_UP: The maximum number which
> diff --git a/drivers/clk/clk-ti-gate.c b/drivers/clk/ti/clk-gate.c
> similarity index 100%
> rename from drivers/clk/clk-ti-gate.c
> rename to drivers/clk/ti/clk-gate.c
> diff --git a/drivers/clk/clk-ti-mux.c b/drivers/clk/ti/clk-mux.c
> similarity index 99%
> rename from drivers/clk/clk-ti-mux.c
> rename to drivers/clk/ti/clk-mux.c
> index 2c5801a39c..35470255af 100644
> --- a/drivers/clk/clk-ti-mux.c
> +++ b/drivers/clk/ti/clk-mux.c
> @@ -13,7 +13,7 @@
> #include <clk-uclass.h>
> #include <asm/io.h>
> #include <linux/clk-provider.h>
> -#include "clk-ti.h"
> +#include "clk.h"
>
> struct clk_ti_mux_priv {
> struct clk_bulk parents;
> diff --git a/drivers/clk/clk-ti-sci.c b/drivers/clk/ti/clk-sci.c
> similarity index 100%
> rename from drivers/clk/clk-ti-sci.c
> rename to drivers/clk/ti/clk-sci.c
> diff --git a/drivers/clk/clk-ti.c b/drivers/clk/ti/clk.c
> similarity index 96%
> rename from drivers/clk/clk-ti.c
> rename to drivers/clk/ti/clk.c
> index 594ef75270..e44b90ad6a 100644
> --- a/drivers/clk/clk-ti.c
> +++ b/drivers/clk/ti/clk.c
> @@ -7,7 +7,7 @@
>
> #include <common.h>
> #include <asm/io.h>
> -#include "clk-ti.h"
> +#include "clk.h"
>
> static void clk_ti_rmw(u32 val, u32 mask, fdt_addr_t reg)
> {
> diff --git a/drivers/clk/clk-ti.h b/drivers/clk/ti/clk.h
> similarity index 100%
> rename from drivers/clk/clk-ti.h
> rename to drivers/clk/ti/clk.h
>
