Dear Wolfgang Denk, Vipin Kumar, > > In message <[email protected]> you wrote: >>>> This writel results in writing byte by byte on the address pointed to by >>>> status_reg. >>>> This problem is visible with both gcc version 4.4.1 as well as 4.5.0 >>> I bet this is on some ARM system? >> Yes, it is on an ARM system (CortexA9). But I still feel that since I am >> creating >> a new u32 * status_reg, the code should not use any intelligence and use the >> pointer >> only to produce an str instruction in the form >> str r0, [r1] >> >> But it retains the packed property of the structure even with a new u32 >> ponter >> typecasted to u32 * >> u32 * status_reg = (u32 *)xyz->x; >> >> A writel to status_reg results in byte by byte writing
How do you know that? Disassembly? Bus snooping? > > I agree with you. I always considered such behaviour of the ARM C > compiler a bug, and still do. However, people with better knowledge > of the ARm architecture than me might be able to explain why the > responsible PTB consider this to be a good and necessary "feature" of > th compiler. Maybe because writel(v,a) is ultimately defined as (*(volatile unsigned int *)(a) = (v)) and the compiler has to assume the worst, i.e. that (a) is not word aligned? Maybe there is a new compiler switch to turn that "pessimisation" off? On the other hand, if what you say were true, all code for AT91 that uses writel() to access 32 bit only peripheral registers would not work with those newer toolchains (still 4.2.4 here). Best Regards, Reinhard _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
