The ECC calculations were started by writing 1 << 13 to the nand FCR register;
that value is also defined as DAVINCI_NANDFCR_4BIT_CALC_START in emif_defs.h.
This patch substitutes the macro DAVINCI_NANDFCR_4BIT_CALC_START for the
magic number '1 << 13'.
Signed-off-by: Ben Gardiner <bengardi...@nanometrics.ca>
CC: Sandeep Paulraj <s-paul...@ti.com>
To: Scott Wood <scottw...@freescale.com>
---
drivers/mtd/nand/davinci_nand.c | 3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
index c5a86d6..d41579c 100644
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -481,7 +481,8 @@ static int nand_davinci_4bit_correct_data(struct mtd_info
*mtd, uint8_t *dat,
* Set the addr_calc_st bit(bit no 13) in the NAND Flash Control
* register to 1.
*/
- __raw_writel(1 << 13, &davinci_emif_regs->nandfcr);
+ __raw_writel(DAVINCI_NANDFCR_4BIT_CALC_START,
+ &davinci_emif_regs->nandfcr);
/*
* Wait for the corr_state field (bits 8 to 11) in the
--
1.7.0.4
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