Am Sun, Feb 21, 2021 at 08:26:23AM -0800 schrieb Ye Li:
> Add clock function to setup relevant clocks for USB3.0 controllers and
> PHYs on i.MX8MQ
> 
> Signed-off-by: Ye Li <[email protected]>

Reviewed-by: Patrick Wildt <[email protected]>
Tested-by: Patrick Wildt <[email protected]>

> ---
>  arch/arm/include/asm/arch-imx8m/clock.h |  1 +
>  arch/arm/mach-imx/imx8m/clock_imx8mq.c  | 22 ++++++++++++++++++++++
>  2 files changed, 23 insertions(+)
> 
> diff --git a/arch/arm/include/asm/arch-imx8m/clock.h 
> b/arch/arm/include/asm/arch-imx8m/clock.h
> index c545eb8..e806552 100644
> --- a/arch/arm/include/asm/arch-imx8m/clock.h
> +++ b/arch/arm/include/asm/arch-imx8m/clock.h
> @@ -257,6 +257,7 @@ u32 imx_get_uartclk(void);
>  int clock_init(void);
>  void init_clk_usdhc(u32 index);
>  void init_uart_clk(u32 index);
> +void init_usb_clk(void);
>  void init_wdog_clk(void);
>  unsigned int mxc_get_clock(enum mxc_clock clk);
>  int clock_enable(enum clk_ccgr_index index, bool enable);
> diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mq.c 
> b/arch/arm/mach-imx/imx8m/clock_imx8mq.c
> index 759ec6d..cccd645 100644
> --- a/arch/arm/mach-imx/imx8m/clock_imx8mq.c
> +++ b/arch/arm/mach-imx/imx8m/clock_imx8mq.c
> @@ -393,6 +393,28 @@ void init_wdog_clk(void)
>       clock_enable(CCGR_WDOG3, 1);
>  }
>  
> +void init_usb_clk(void)
> +{
> +     if (!is_usb_boot()) {
> +             clock_enable(CCGR_USB_CTRL1, 0);
> +             clock_enable(CCGR_USB_CTRL2, 0);
> +             clock_enable(CCGR_USB_PHY1, 0);
> +             clock_enable(CCGR_USB_PHY2, 0);
> +             /* 500MHz */
> +             clock_set_target_val(USB_BUS_CLK_ROOT, CLK_ROOT_ON |
> +                                  CLK_ROOT_SOURCE_SEL(1));
> +             /* 100MHz */
> +             clock_set_target_val(USB_CORE_REF_CLK_ROOT, CLK_ROOT_ON |
> +                                  CLK_ROOT_SOURCE_SEL(1));
> +             /* 100MHz */
> +             clock_set_target_val(USB_PHY_REF_CLK_ROOT, CLK_ROOT_ON |
> +                                  CLK_ROOT_SOURCE_SEL(1));
> +             clock_enable(CCGR_USB_CTRL1, 1);
> +             clock_enable(CCGR_USB_CTRL2, 1);
> +             clock_enable(CCGR_USB_PHY1, 1);
> +             clock_enable(CCGR_USB_PHY2, 1);
> +     }
> +}
>  
>  void init_nand_clk(void)
>  {
> -- 
> 2.7.4
> 

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