Before e2e95e5e254 ("spi: Update speed/mode on change") most systems
silently defaulted to SF bus mode 0. Now the mode is always updated,
which causes breakage. It seems most SF which are used as boot media
operate in bus mode 0, so switch that as the default.This should fix booting at least on Altera SoCFPGA, ST STM32, Xilinx ZynqMP, NXP iMX and Rockchip SoCs, which recently ran into trouble with mode 3. Marvell Kirkwood and Xilinx microblaze need to be checked as those might need mode 3. Signed-off-by: Marek Vasut <[email protected]> Cc: Aleksandar Gerasimovski <[email protected]> Cc: Andreas Biessmann <[email protected]> Cc: Eugen Hristev <[email protected]> Cc: Michal Simek <[email protected]> Cc: Patrice Chotard <[email protected]> Cc: Patrick Delaunay <[email protected]> Cc: Peng Fan <[email protected]> Cc: Siew Chin Lim <[email protected]> Cc: Tom Rini <[email protected]> Cc: Valentin Longchamp <[email protected]> Cc: Vignesh Raghavendra <[email protected]> --- drivers/mtd/spi/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig index b2291f72905..f03fe05e333 100644 --- a/drivers/mtd/spi/Kconfig +++ b/drivers/mtd/spi/Kconfig @@ -57,7 +57,7 @@ config SF_DEFAULT_CS config SF_DEFAULT_MODE hex "SPI Flash default mode (see include/spi.h)" depends on SPI_FLASH || DM_SPI_FLASH - default 3 + default 0 help The default mode may be provided by the platform to handle the common case when only a single serial -- 2.33.0
