Hi Did you get an answer I missed ?
There’s active discussion on DTB lifecycle. >From the Xilinx boards I am aware of, there is a Xilinx primary boot loader that then loads u-boot SPL and then U-Boot proper. My understanding is that you can attach the hardware description DTB with the bitstream and pass it across to U-Boot proper. Your build system can take a base board DTS and add the FPGA devices to it to generate the DTB. I’ll ask an FPGA expert to comment. Cheers FF Le jeu. 14 oct. 2021 à 16:18, Andreas Oetken <ennoerlan...@gmail.com> a écrit : > Dear U-Boot experts, > > If I embed a u-boot binary into a FPGA bitstream (block memory) are > there any license issues? I can't release the FPGA hardware description > files. So the only alternative I could think of would be another small > bootloader loading the u-boot binary from an external non-volatile > memory. > > Thank you, > Best Regards, > Andreas > > -- François-Frédéric Ozog | *Director Business Development* T: +33.67221.6485 francois.o...@linaro.org | Skype: ffozog
