On Tue, Oct 19, 2021 at 09:13:07AM +0200, François Ozog wrote: > Hi > > Did you get an answer I missed ? > > There’s active discussion on DTB lifecycle. > > From the Xilinx boards I am aware of, there is a Xilinx primary boot loader > that then loads u-boot SPL and then U-Boot proper. > > My understanding is that you can attach the hardware description DTB with > the bitstream and pass it across to U-Boot proper. > Your build system can take a base board DTS and add the FPGA devices to it > to generate the DTB. > > I’ll ask an FPGA expert to comment.
The only answer here is that "we are not lawyers". Going back to the original question, it doesn't read to me like Andreas is either. Now, if some lawyers have technical questions in order to formulate some advise, that's another matter. But it doesn't matter all that much what a bunch of engineers think the finer points of unspecified laws mean. -- Tom
signature.asc
Description: PGP signature
