Hi David, On 2023-07-10 13:05, David Hewitt wrote: > Specification: > - Rockchip RK3566 > - 4 or 8GB LPDDR4 > - 64 or 128 GB eMMC storage > - mSD card slot > - 128Mbit (16Mb) SPI Flash > - BES2600 for WiFi + BT > - 10.1 inch 1280*800 MIPI display > - Front and rear cameras > - USB 3.0, 2.0 Type-C ports > - 6000 mAh battery > - Micro HDMI output > > This patch has been tested on a production version of the hardware > and can boot from eMMC or SD card at this stage. > > Note that SD card boot will not work without the second patch in the > series to add a quirk for the Designware MMC controller.
Please see my reply to your patch regarding this. > > Signed-off-by: David Hewitt <[email protected]> > Cc: Simon Glass <[email protected]> > Cc: Philipp Tomsich <[email protected]> > Cc: Kever Yang <[email protected]> > --- > arch/arm/dts/Makefile | 1 + > arch/arm/dts/rk3566-pinetab2.dts | 422 ++++++++++++++++++ > arch/arm/mach-rockchip/rk3568/Kconfig | 9 + > board/pine64/pinetab2-rk3566/Kconfig | 15 + > board/pine64/pinetab2-rk3566/MAINTAINERS | 7 + > board/pine64/pinetab2-rk3566/Makefile | 5 + > .../pine64/pinetab2-rk3566/pinetab2-rk3566.c | 1 + > configs/pinetab2_defconfig | 83 ++++ > include/configs/pinetab2-rk3566.h | 13 + > 9 files changed, 556 insertions(+) > create mode 100644 arch/arm/dts/rk3566-pinetab2.dts > create mode 100644 board/pine64/pinetab2-rk3566/Kconfig > create mode 100644 board/pine64/pinetab2-rk3566/MAINTAINERS > create mode 100644 board/pine64/pinetab2-rk3566/Makefile > create mode 100644 board/pine64/pinetab2-rk3566/pinetab2-rk3566.c > create mode 100644 configs/pinetab2_defconfig > create mode 100644 include/configs/pinetab2-rk3566.h > > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile > index 17f506a8fa..58ab11369d 100644 > --- a/arch/arm/dts/Makefile > +++ b/arch/arm/dts/Makefile > @@ -167,6 +167,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \ > > dtb-$(CONFIG_ROCKCHIP_RK3568) += \ > rk3566-anbernic-rgxx3.dtb \ > + rk3566-pinetab2.dts \ > rk3566-radxa-cm3-io.dtb \ > rk3568-evb.dtb \ > rk3568-rock-3a.dtb > diff --git a/arch/arm/dts/rk3566-pinetab2.dts > b/arch/arm/dts/rk3566-pinetab2.dts > new file mode 100644 > index 0000000000..776f57152d > --- /dev/null > +++ b/arch/arm/dts/rk3566-pinetab2.dts > @@ -0,0 +1,422 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > + > +/dts-v1/; > +#include <dt-bindings/gpio/gpio.h> > +#include <dt-bindings/pinctrl/rockchip.h> > +#include "rk3566.dtsi" > +#include "rk356x-u-boot.dtsi" The board dts file should be a full import from the linux tree and should not contain any u-boot references. U-Boot specific nodes and properties should be placed in a <board>-u-boot.dtsi file. This board has also not yet been submitted let alone been merged into a linux maintainer tree, so should probably not be accepted into u-boot until that has happened. > + > +/ { > + model = "Pine64 PineTab 2"; > + compatible = "rockchip,rk3566-pinetab", "rockchip,rk3566"; > + > + aliases { > + mmc0 = &sdmmc0; > + mmc1 = &sdhci; > + }; > + > + chosen: chosen { > + stdout-path = "serial2:1500000n8"; > + }; > + > + battery: battery { > + compatible = "simple-battery"; > + charge-full-design-microamp-hours = <6000000>; > + charge-term-current-microamp = <300000>; > + constant-charge-current-max-microamp = <2000000>; > + constant-charge-voltage-max-microvolt = <4300000>; > + voltage-max-design-microvolt = <4350000>; > + voltage-min-design-microvolt = <3400000>; > + > + ocv-capacity-celsius = <20>; > + ocv-capacity-table-0 = <4322000 100>, <4250000 95>, <4192000 > 90>, <4136000 85>, > + <4080000 80>, <4022000 75>, <3972000 > 70>, <3928000 65>, > + <3885000 60>, <3833000 55>, <3798000 > 50>, <3780000 45>, > + <3776000 40>, <3773000 35>, <3755000 > 30>, <3706000 25>, > + <3640000 20>, <3589000 15>, <3535000 > 10>, <3492000 5>, > + <3400000 0>; > + }; > + > + vcc_bat: vcc_bat { > + compatible = "regulator-fixed"; > + regulator-name = "vcc_bat"; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + vcc_sys: vcc_sys { > + compatible = "regulator-fixed"; > + regulator-name = "vcc_sys"; > + regulator-always-on; > + regulator-boot-on; > + vin-supply = <&vcc_bat>; > + }; > + > + vcc_3v3: vcc_3v3 { > + compatible = "regulator-fixed"; > + regulator-name = "vcc_3v3"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + vin-supply = <&vcc3v3_sys>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc3v3_sd: vcc3v3_sd { > + compatible = "regulator-fixed"; > + gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&sdmmc_pwren_l>; > + regulator-name = "vcc3v3_sd"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + vin-supply = <&vcc3v3_sys>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > +}; > + > +&cpu0 { > + cpu-supply = <&vdd_cpu>; > +}; > + > +&cpu1 { > + cpu-supply = <&vdd_cpu>; > +}; > + > +&cpu2 { > + cpu-supply = <&vdd_cpu>; > +}; > + > +&cpu3 { > + cpu-supply = <&vdd_cpu>; > +}; > + > +&cru { > + assigned-clocks = <&cru PLL_GPLL>, <&pmucru PLL_PPLL>, <&cru PLL_VPLL>; > + assigned-clock-rates = <1200000000>, <200000000>, <500000000>; > +}; > + > +&i2c0 { > + clock-frequency = <400000>; > + status = "okay"; > + > + vdd_cpu: regulator@1c { > + compatible = "tcs,tcs4525"; > + reg = <0x1c>; > + fcs,suspend-voltage-selector = <1>; > + regulator-name = "vdd_cpu"; > + regulator-min-microvolt = <800000>; > + regulator-max-microvolt = <1150000>; > + regulator-ramp-delay = <2300>; > + regulator-always-on; > + regulator-boot-on; > + vin-supply = <&vcc_sys>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + rk817: pmic@20 { > + compatible = "rockchip,rk817"; > + reg = <0x20>; > + interrupt-parent = <&gpio0>; > + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; > + assigned-clocks = <&cru I2S1_MCLKOUT_TX>; > + assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; > + clock-names = "mclk"; > + clocks = <&cru I2S1_MCLKOUT_TX>; > + clock-output-names = "rk808-clkout1", "rk808-clkout2"; > + #clock-cells = <1>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>; > + rockchip,system-power-controller; > + #sound-dai-cells = <0>; > + wakeup-source; > + > + vcc1-supply = <&vcc_sys>; > + vcc2-supply = <&vcc_sys>; > + vcc3-supply = <&vcc_sys>; > + vcc4-supply = <&vcc_sys>; > + vcc5-supply = <&vcc_sys>; > + vcc6-supply = <&vcc_sys>; > + vcc7-supply = <&vcc_sys>; > + vcc8-supply = <&vcc_sys>; > + vcc9-supply = <&vcc5v_midu>; > + > + regulators { > + vdd_logic: DCDC_REG1 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <500000>; > + regulator-max-microvolt = <1350000>; > + regulator-init-microvolt = <900000>; > + regulator-ramp-delay = <6001>; > + regulator-initial-mode = <0x2>; > + regulator-name = "vdd_logic"; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vdd_gpu_npu: DCDC_REG2 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <500000>; > + regulator-max-microvolt = <1350000>; > + regulator-init-microvolt = <900000>; > + regulator-ramp-delay = <6001>; > + regulator-initial-mode = <0x2>; > + regulator-name = "vdd_gpu_npu"; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc_ddr: DCDC_REG3 { > + regulator-always-on; > + regulator-boot-on; > + regulator-initial-mode = <0x2>; > + regulator-name = "vcc_ddr"; > + regulator-state-mem { > + regulator-on-in-suspend; > + }; > + }; > + > + vcc3v3_sys: DCDC_REG4 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-initial-mode = <0x2>; > + regulator-name = "vcc3v3_sys"; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcca1v8_pmu: LDO_REG1 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-name = "vcca1v8_pmu"; > + regulator-state-mem { > + regulator-on-in-suspend; > + }; > + }; > + > + vdda_0v9_p: LDO_REG2 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <900000>; > + regulator-max-microvolt = <900000>; > + regulator-name = "vdda_0v9_p"; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vdda0v9_pmu: LDO_REG3 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <900000>; > + regulator-max-microvolt = <900000>; > + regulator-name = "vdda0v9_pmu"; > + regulator-state-mem { > + regulator-on-in-suspend; > + }; > + }; > + > + vccio_acodec: LDO_REG4 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-name = "vccio_acodec"; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vccio_sd: LDO_REG5 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <3300000>; > + regulator-name = "vccio_sd"; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc3v3_pmu: LDO_REG6 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-name = "vcc3v3_pmu"; > + regulator-state-mem { > + regulator-on-in-suspend; > + }; > + }; > + > + vcc_1v8: LDO_REG7 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-name = "vcc_1v8"; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc1v8_dvp: LDO_REG8 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-name = "vcc1v8_dvp"; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc2v8_dvp: LDO_REG9 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <2800000>; > + regulator-max-microvolt = <2800000>; > + regulator-name = "vcc2v8_dvp"; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc5v_midu: BOOST { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + regulator-name = "boost"; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vbus: OTG_SWITCH { > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + regulator-name = "otg_switch"; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + }; > + > + charger { > + monitored-battery = <&battery>; > + rockchip,resistor-sense-micro-ohms = <10000>; > + rockchip,sleep-enter-current-microamp = <300000>; > + rockchip,sleep-filter-current-microamp = <100000>; > + }; > + }; > +}; > + > +&pinctrl { > + display { > + lcd_pwren_h: lcd-pwren-h { > + rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + > + lcd0_rst_l: lcd0-rst-l { > + rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > + > + pcie { > + pcie_pwren_h: pcie-pwren-h { > + rockchip,pins = <4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + > + pcie_reset_h: pcie-reset-h { > + rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > + > + pmic { > + pmic_int_l: pmic-int-l { > + rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; > + }; > + }; > + > + sd { > + sdmmc_pwren_l: sdmmc-pwren-l { > + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > + > + usb { > + usbcc_int_l: usbcc-int-l { > + rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + > + usb_host_pwren1_h: usb-host-pwren1-h { > + rockchip,pins = <4 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + > + usb_host_pwren2_h: usb-host-pwren2-h { > + rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > +}; > + > +&pmu_io_domains { > + pmuio1-supply = <&vcc3v3_pmu>; > + pmuio2-supply = <&vcca1v8_pmu>; > + vccio1-supply = <&vccio_acodec>; > + vccio2-supply = <&vcc_1v8>; > + vccio3-supply = <&vccio_sd>; > + vccio4-supply = <&vcc_1v8>; > + vccio5-supply = <&vcc_1v8>; > + vccio6-supply = <&vcc1v8_dvp>; > + vccio7-supply = <&vcc_3v3>; > + status = "okay"; > +}; > + > +&sdhci { > + bus-width = <8>; > + max-frequency = <200000000>; > + non-removable; > + pinctrl-names = "default"; > + pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; > + status = "okay"; > +}; > + > +&sdmmc0 { > + bus-width = <4>; > + cap-sd-highspeed; > + cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; > + disable-wp; > + rockchip,disable-pwren-quirk; > + pinctrl-names = "default"; > + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; > + sd-uhs-sdr104; > + vmmc-supply = <&vcc3v3_sd>; > + vqmmc-supply = <&vccio_sd>; > + status = "okay"; > +}; > + > +&uart2 { > + clock-frequency = <24000000>; > + bootph-pre-ram; > + status = "okay"; > +}; > diff --git a/arch/arm/mach-rockchip/rk3568/Kconfig > b/arch/arm/mach-rockchip/rk3568/Kconfig > index 94e04b79e7..eb106c4a72 100644 > --- a/arch/arm/mach-rockchip/rk3568/Kconfig > +++ b/arch/arm/mach-rockchip/rk3568/Kconfig > @@ -17,6 +17,14 @@ config TARGET_ANBERNIC_RGXX3_RK3566 > and RG503. The correct device tree name will automatically > be selected by the bootloader. > > +config TARGET_PINETAB2_RK3566 > + bool "PINE64 PineTab2" > + select BOARD_LATE_INIT > + help > + PineTab2 is a tablet computer based on the Rockchip RK3566 > + SoC with either 4GB or 8GB of RAM, onboard eMMC, USB-C, > + a 1280x800 display and all of the usual tablet features. > + > endchoice > > config ROCKCHIP_BOOT_MODE_REG > @@ -33,5 +41,6 @@ config SYS_MALLOC_F_LEN > > source "board/rockchip/evb_rk3568/Kconfig" > source "board/anbernic/rgxx3_rk3566/Kconfig" > +source "board/pine64/pinetab2-rk3566/Kconfig" > > endif > diff --git a/board/pine64/pinetab2-rk3566/Kconfig > b/board/pine64/pinetab2-rk3566/Kconfig > new file mode 100644 > index 0000000000..2e713035fb > --- /dev/null > +++ b/board/pine64/pinetab2-rk3566/Kconfig > @@ -0,0 +1,15 @@ > +if TARGET_PINETAB2_RK3566 > + > +config SYS_BOARD > + default "pinetab2-rk3566" > + > +config SYS_VENDOR > + default "pine64" > + > +config SYS_CONFIG_NAME > + default "pinetab2-rk3566" > + > +config BOARD_SPECIFIC_OPTIONS > + def_bool y > + > +endif > diff --git a/board/pine64/pinetab2-rk3566/MAINTAINERS > b/board/pine64/pinetab2-rk3566/MAINTAINERS > new file mode 100644 > index 0000000000..e2bb88b476 > --- /dev/null > +++ b/board/pine64/pinetab2-rk3566/MAINTAINERS > @@ -0,0 +1,7 @@ > +PINE64 PINETAB2 > +M: David Hewitt <[email protected]> > +S: Maintained > +F: arch/arm/dts/rk3566-pinetab2.dts > +F: board/pine64/pinetab2-rk3566/ > +F: configs/pinetab2_defconfig > +F: include/configs/pinetab2-rk3566.h > diff --git a/board/pine64/pinetab2-rk3566/Makefile > b/board/pine64/pinetab2-rk3566/Makefile > new file mode 100644 > index 0000000000..ff619ba2c4 > --- /dev/null > +++ b/board/pine64/pinetab2-rk3566/Makefile > @@ -0,0 +1,5 @@ > +# > +# SPDX-License-Identifier: GPL-2.0+ > +# > + > +obj-y += pinetab2-rk3566.o > \ No newline at end of file > diff --git a/board/pine64/pinetab2-rk3566/pinetab2-rk3566.c > b/board/pine64/pinetab2-rk3566/pinetab2-rk3566.c > new file mode 100644 > index 0000000000..4c027f2a7a > --- /dev/null > +++ b/board/pine64/pinetab2-rk3566/pinetab2-rk3566.c > @@ -0,0 +1 @@ > +// SPDX-License-Identifier: GPL-2.0+ > diff --git a/configs/pinetab2_defconfig b/configs/pinetab2_defconfig > new file mode 100644 > index 0000000000..020dde8fbb > --- /dev/null > +++ b/configs/pinetab2_defconfig > @@ -0,0 +1,83 @@ > +CONFIG_ARM=y > +CONFIG_SKIP_LOWLEVEL_INIT=y > +CONFIG_COUNTER_FREQUENCY=24000000 > +CONFIG_ARCH_ROCKCHIP=y > +CONFIG_TEXT_BASE=0x00a00000 > +CONFIG_SPL_LIBCOMMON_SUPPORT=y > +CONFIG_SPL_LIBGENERIC_SUPPORT=y > +CONFIG_NR_DRAM_BANKS=2 > +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y > +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 > +CONFIG_DEFAULT_DEVICE_TREE="rk3566-pinetab2" > +CONFIG_TARGET_PINETAB2_RK3566=y > +CONFIG_ROCKCHIP_RK3568=y > +CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y > +CONFIG_SPL_SERIAL=y > +CONFIG_SPL_STACK_R_ADDR=0x600000 > +CONFIG_SPL_STACK=0x400000 > +CONFIG_DEBUG_UART_BASE=0xFE660000 > +CONFIG_DEBUG_UART_CLOCK=24000000 > +CONFIG_SYS_LOAD_ADDR=0xc00800 > +CONFIG_DEBUG_UART=y > +CONFIG_FIT=y > +CONFIG_FIT_VERBOSE=y > +CONFIG_BOOTSTD_FULL=y > +CONFIG_SPL_FIT_SIGNATURE=y > +CONFIG_SPL_LOAD_FIT=y > +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3566-pinetab2.dtb" > +# CONFIG_DISPLAY_CPUINFO is not set > +CONFIG_DISPLAY_BOARDINFO_LATE=y > +CONFIG_SPL_MAX_SIZE=0x40000 > +CONFIG_SPL_PAD_TO=0x7f8000 > +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y > +CONFIG_SPL_BSS_START_ADDR=0x4000000 > +CONFIG_SPL_BSS_MAX_SIZE=0x4000 > +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set > +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set > +CONFIG_SPL_STACK_R=y > +CONFIG_SPL_ATF=y > +CONFIG_CMD_GPIO=y > +CONFIG_CMD_GPT=y > +CONFIG_CMD_I2C=y > +CONFIG_CMD_MMC=y > +CONFIG_CMD_USB=y > +# CONFIG_CMD_SETEXPR is not set > +CONFIG_CMD_PMIC=y > +CONFIG_CMD_REGULATOR=y > +# CONFIG_SPL_DOS_PARTITION is not set > +CONFIG_SPL_OF_CONTROL=y > +CONFIG_OF_LIVE=y > +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks > assigned-clock-rates assigned-clock-parents" > +CONFIG_SPL_REGMAP=y > +CONFIG_SPL_SYSCON=y > +CONFIG_SPL_CLK=y > +CONFIG_ROCKCHIP_GPIO=y > +CONFIG_SYS_I2C_ROCKCHIP=y > +CONFIG_MISC=y > +CONFIG_SUPPORT_EMMC_RPMB=y > +CONFIG_MMC_DW=y > +CONFIG_MMC_DW_ROCKCHIP=y > +CONFIG_MMC_SDHCI=y > +CONFIG_MMC_SDHCI_SDMA=y > +CONFIG_MMC_SDHCI_ROCKCHIP=y > +CONFIG_ETH_DESIGNWARE=y > +CONFIG_GMAC_ROCKCHIP=y > +CONFIG_PHY_ROCKCHIP_INNO_USB2=y > +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y > +CONFIG_SPL_PINCTRL=y > +CONFIG_DM_PMIC=y > +CONFIG_PMIC_RK8XX=y > +CONFIG_REGULATOR_RK8XX=y > +CONFIG_PWM_ROCKCHIP=y > +CONFIG_SPL_RAM=y > +CONFIG_BAUDRATE=1500000 > +CONFIG_DEBUG_UART_SHIFT=2 > +CONFIG_SYS_NS16550_MEM32=y > +CONFIG_SYSRESET=y > +CONFIG_USB=y > +CONFIG_USB_XHCI_HCD=y > +CONFIG_USB_XHCI_DWC3=y > +CONFIG_USB_EHCI_HCD=y > +CONFIG_USB_EHCI_GENERIC=y > +CONFIG_USB_DWC3=y > +CONFIG_ERRNO_STR=y > diff --git a/include/configs/pinetab2-rk3566.h > b/include/configs/pinetab2-rk3566.h > new file mode 100644 > index 0000000000..3ace5333ef > --- /dev/null > +++ b/include/configs/pinetab2-rk3566.h > @@ -0,0 +1,13 @@ > +/* SPDX-License-Identifier: GPL-2.0+ */ > + > +#ifndef __PINETAB2_RK3566_H > +#define __PINETAB2_RK3566_H > + > +#include <configs/rk3568_common.h> > + > +#define ROCKCHIP_DEVICE_SETTINGS \ > + "stdout=serial,vidconsole\0" \ > + "stderr=serial,vidconsole\0" \ > + "bootmeths=extlinux efi\0" There should not be any need for limiting bootmeths here. This board does not yet need a full board .h or .c-file and can instead piggy back on the evb_rk3568 target. I am carrying patches for all Pine64 rk3566 boards in a GitHub tree at https://github.com/Kwiboo/u-boot-rockchip/commits/rk3568-2023.07 Please note that the boards in my branch depends on some series/patches that have not yet been merged, one reason why those boards have not been submitted yet. Regards, Jonas > + > +#endif
