Hi Wolfgang, On Fri, Apr 1, 2011 at 1:35 PM, Wolfgang Denk <w...@denx.de> wrote: > Dear Lei Wen, > > In message <AANLkTi=bbs7wzcbsh26hb0y_gvxzhteqspovzkkn1...@mail.gmail.com> you > wrote: >> >> > Can you please explain on what board, and with which tool chain, you >> > see any problems? >> >> I test on Marvell pxa955 (MG1) board, with android 4.4.0 toolchain. >> The pxa955's ns16550 register's IER has nine bits. The 8th bit is HSE, which >> means the high speed mode. It seems something wrong there, if access the ier >> by byte, the 8th bit would be 1 at the beginning, and would be cleared >> by the following >> set value in the ns16550 driver, which cause problem on that board, >> for the baudrate >> would be dysfunction. > > This makes no sense to me. I have never seen any 9 bit registers in > any processor I ever encountered in real life.
I don't mean that register is 9bit... I means that register, IER, is 32bit long, but 9-31th bit is reserved, and 0th to 8th bit is used... Maybe I don't say clearly... So byte access would only cover 0-7th bit, while 8th bit is not covered. > Also, in this case the serial controller is probably not NS16550 > compatible, because AFAICT the NS16550 uses only 8 bit wide > registers. This is may be additional feature added. For another part except this one bit is all compatible with ns16550. Best regards, Lei _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
