[Ported to U-Boot from the Linux kernel, commit 78933218f5c, original author Kamal Dasu <[email protected]>] The following description is from that patch:
If both nand-ecc-strength and nand-ecc-step-size are not specified in device tree node for NAND, raw NAND layer does detect ECC information by reading ONFI extended parameter page for parts using ONFI >= 2.1. In case of non-ONFI NAND parts there could be a nand_id table entry with ECC information. If there is valid device tree entry for nand-ecc-strength and nand-ecc-step-size fields it still shall override the detected values. Signed-off-by: Mark Tomlinson <[email protected]> Cc: Dario Binacchi <[email protected]> Cc: Michael Trimarchi <[email protected]> --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index efbf9a3120a..3e5ae93dda2 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -2336,6 +2336,17 @@ static int brcmnand_setup_dev(struct brcmnand_host *host) return -EINVAL; } + if (chip->ecc.mode != NAND_ECC_NONE && + (!chip->ecc.size || !chip->ecc.strength)) { + if (chip->ecc_step_ds && chip->ecc_strength_ds) { + /* use detected parameters */ + chip->ecc.size = chip->ecc_step_ds; + chip->ecc.strength = chip->ecc_strength_ds; + dev_info(ctrl->dev, "Using ECC step-size %d, strength %d\n", + chip->ecc.size, chip->ecc.strength); + } + } + switch (chip->ecc.size) { case 512: if (chip->ecc.algo == NAND_ECC_HAMMING) -- 2.43.2
