Fix PLLD2 info table entry on Tegra124 and Tegra210 which unlike on
Tegra114 and lower does not match PLLD.
Take in account PLLD/D2 enable bit on clock_set_rate call. Those two
seems to be only which have this bit.
Svyatoslav Ryhel (2):
ARM: tegra: clock: take in account PLLD/D2 enable bit on
clock_set_rate
ARM: tegra: clock: fix PLLD2 info table entry on Tegra124 and Tegra210
arch/arm/mach-tegra/clock.c | 6 ++++++
arch/arm/mach-tegra/tegra124/clock.c | 4 ++--
arch/arm/mach-tegra/tegra210/clock.c | 4 ++--
3 files changed, 10 insertions(+), 4 deletions(-)
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2.43.0
