clk_get_rate() returns a ulong so do not attempt to pass negative error codes through it.
Signed-off-by: Andrew Goodbody <[email protected]> --- drivers/clk/meson/a1.c | 10 +++++----- drivers/clk/meson/axg.c | 10 +++++----- drivers/clk/meson/g12a.c | 36 ++++++++++++++++++------------------ drivers/clk/meson/gxbb.c | 20 ++++++++++---------- 4 files changed, 38 insertions(+), 38 deletions(-) diff --git a/drivers/clk/meson/a1.c b/drivers/clk/meson/a1.c index a1b8d79149102183402f470a60511d5300d0232c..78cad13239ca174a30f88cb2b18191cea74d6248 100644 --- a/drivers/clk/meson/a1.c +++ b/drivers/clk/meson/a1.c @@ -359,7 +359,7 @@ static ulong meson_div_get_rate(struct clk *clk, unsigned long id) info = meson_clk_get_info(clk, id, MESON_CLK_DIV); if (IS_ERR(info)) - return PTR_ERR(info); + return 0; /* Actual divider value is (field value + 1), hence the increment */ n = GET_PARM_VALUE(priv, info->parm) + 1; @@ -402,7 +402,7 @@ static ulong meson_pll_get_rate(struct clk *clk, unsigned long id) info = meson_clk_get_info(clk, id, MESON_CLK_ANY); if (IS_ERR(info)) - return PTR_ERR(info); + return 0; pm = &info->parm[0]; pn = &info->parm[1]; @@ -411,7 +411,7 @@ static ulong meson_pll_get_rate(struct clk *clk, unsigned long id) m = GET_PARM_VALUE(priv, pm); if (n == 0) - return -EINVAL; + return 0; parent = info->parents[0]; parent_rate_mhz = meson_clk_get_rate_by_id(clk, parent) / 1000000; @@ -453,13 +453,13 @@ static ulong meson_clk_get_rate_by_id(struct clk *clk, unsigned long id) ret = clk_get_by_name(clk->dev, info->name, &external_clk); if (ret) - return ret; + return 0; rate = clk_get_rate(&external_clk); break; } default: - rate = -EINVAL; + rate = 0; break; } diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c index c421a622a587d2eddef70d28b65e560722cf7f62..e0b41811b0dfcc59f9a57366639ff2133209b697 100644 --- a/drivers/clk/meson/axg.c +++ b/drivers/clk/meson/axg.c @@ -104,7 +104,7 @@ static unsigned long meson_clk81_get_rate(struct clk *clk) parent_rate = XTAL_RATE; break; case 1: - return -ENOENT; + return 0; default: parent_rate = meson_clk_get_rate_by_id(clk, parents[reg]); } @@ -123,7 +123,7 @@ static long mpll_rate_from_params(unsigned long parent_rate, unsigned long divisor = (SDM_DEN * n2) + sdm; if (n2 < N2_MIN) - return -EINVAL; + return 0; return DIV_ROUND_UP_ULL((u64)parent_rate * SDM_DEN, divisor); } @@ -171,7 +171,7 @@ static ulong meson_mpll_get_rate(struct clk *clk, unsigned long id) pn2 = &meson_mpll2_parm[1]; break; default: - return -ENOENT; + return 0; } parent_rate = meson_clk_get_rate_by_id(clk, CLKID_FIXED_PLL); @@ -219,7 +219,7 @@ static ulong meson_pll_get_rate(struct clk *clk, unsigned long id) pod = &meson_sys_pll_parm[2]; break; default: - return -ENOENT; + return 0; } regmap_read(priv->map, pn->reg_off, ®); @@ -272,7 +272,7 @@ static ulong meson_clk_get_rate_by_id(struct clk *clk, unsigned long id) rate = meson_clk81_get_rate(clk); break; } - return -ENOENT; + return 0; } debug("clock %lu has rate %lu\n", id, rate); diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c index a7a42b2edb6a5b98612fb71fec6d17b1f3ab77c8..910b91e874bfdf6753ffc40bec7cd3a94e0b41ad 100644 --- a/drivers/clk/meson/g12a.c +++ b/drivers/clk/meson/g12a.c @@ -264,7 +264,7 @@ static ulong meson_div_get_rate(struct clk *clk, unsigned long id) parent = meson_hdmi_div_parent; break; default: - return -ENOENT; + return 0; } regmap_read(priv->map, parm->reg_off, ®); @@ -273,8 +273,8 @@ static ulong meson_div_get_rate(struct clk *clk, unsigned long id) debug("%s: div of %ld is %d\n", __func__, id, reg + 1); parent_rate = meson_clk_get_rate_by_id(clk, parent); - if (IS_ERR_VALUE(parent_rate)) - return parent_rate; + if (!parent_rate) + return 0; debug("%s: parent rate of %ld is %d\n", __func__, id, parent_rate); @@ -323,12 +323,12 @@ static ulong meson_div_set_rate(struct clk *clk, unsigned long id, ulong rate, parent = meson_hdmi_div_parent; break; default: - return -ENOENT; + return 0; } parent_rate = meson_clk_get_rate_by_id(clk, parent); - if (IS_ERR_VALUE(parent_rate)) - return parent_rate; + if (!parent_rate) + return 0; debug("%s: parent rate of %ld is %ld\n", __func__, id, parent_rate); @@ -348,15 +348,15 @@ static ulong meson_div_set_rate(struct clk *clk, unsigned long id, ulong rate, return ret; parent_rate = meson_clk_get_rate_by_id(clk, parent); - if (IS_ERR_VALUE(parent_rate)) - return parent_rate; + if (!parent_rate) + return 0; new_div = DIV_ROUND_CLOSEST(parent_rate, rate); debug("%s: new new div of %ld is %d\n", __func__, id, new_div); if (!new_div || new_div > (1 << parm->width)) - return -EINVAL; + return 0; } debug("%s: setting div of %ld to %d\n", __func__, id, new_div); @@ -471,7 +471,7 @@ static ulong meson_mux_get_parent(struct clk *clk, unsigned long id) parents = meson_hdmi_mux_parents; break; default: - return -ENOENT; + return 0; } regmap_read(priv->map, parm->reg_off, ®); @@ -560,8 +560,8 @@ static ulong meson_mux_get_rate(struct clk *clk, unsigned long id) { int parent = meson_mux_get_parent(clk, id); - if (IS_ERR_VALUE(parent)) - return parent; + if (!parent) + return 0; return meson_clk_get_rate_by_id(clk, parent); } @@ -588,7 +588,7 @@ static unsigned long meson_clk81_get_rate(struct clk *clk) switch (reg) { case 1: - return -ENOENT; + return 0; default: parent_rate = meson_clk_get_rate_by_id(clk, parents[reg]); } @@ -655,12 +655,12 @@ static ulong meson_mpll_get_rate(struct clk *clk, unsigned long id) pn2 = &meson_mpll2_parm[1]; break; default: - return -ENOENT; + return 0; } parent_rate = meson_clk_get_rate_by_id(clk, CLKID_FIXED_PLL); - if (IS_ERR_VALUE(parent_rate)) - return parent_rate; + if (!parent_rate) + return 0; regmap_read(priv->map, psdm->reg_off, ®); sdm = PARM_GET(psdm->width, psdm->shift, reg); @@ -711,7 +711,7 @@ static ulong meson_pll_get_rate(struct clk *clk, unsigned long id) pod = &meson_sys_pll_parm[2]; break; default: - return -ENOENT; + return 0; } regmap_read(priv->map, pn->reg_off, ®); @@ -851,7 +851,7 @@ static ulong meson_clk_get_rate_by_id(struct clk *clk, unsigned long id) rate = meson_clk81_get_rate(clk); break; } - return -ENOENT; + return 0; } debug("clock %lu has rate %lu\n", id, rate); diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c index 51f124869c9c4043dfe047cf2f694bf59df7e87f..6dcfd084b8f93ade3fe1270db48f91f87cb61d26 100644 --- a/drivers/clk/meson/gxbb.c +++ b/drivers/clk/meson/gxbb.c @@ -306,7 +306,7 @@ static ulong meson_div_get_rate(struct clk *clk, unsigned long id) parent = meson_hdmi_div_parent; break; default: - return -ENOENT; + return 0; } regmap_read(priv->map, parm->reg_off, ®); @@ -315,8 +315,8 @@ static ulong meson_div_get_rate(struct clk *clk, unsigned long id) debug("%s: div of %ld is %d\n", __func__, id, reg + 1); parent_rate = meson_clk_get_rate_by_id(clk, parent); - if (IS_ERR_VALUE(parent_rate)) - return parent_rate; + if (!parent_rate) + return 0; debug("%s: parent rate of %ld is %d\n", __func__, id, parent_rate); @@ -596,8 +596,8 @@ static ulong meson_mux_get_rate(struct clk *clk, unsigned long id) { int parent = meson_mux_get_parent(clk, id); - if (IS_ERR_VALUE(parent)) - return parent; + if (parent < 0) + return 0; return meson_clk_get_rate_by_id(clk, parent); } @@ -627,7 +627,7 @@ static unsigned long meson_clk81_get_rate(struct clk *clk) parent_rate = XTAL_RATE; break; case 1: - return -ENOENT; + return 0; default: parent_rate = meson_clk_get_rate_by_id(clk, parents[reg]); } @@ -695,12 +695,12 @@ static ulong meson_mpll_get_rate(struct clk *clk, unsigned long id) pn2 = &meson_mpll2_parm[1]; break; default: - return -ENOENT; + return 0; } parent_rate = meson_clk_get_rate_by_id(clk, CLKID_FIXED_PLL); - if (IS_ERR_VALUE(parent_rate)) - return parent_rate; + if (!parent_rate) + return 0; regmap_read(priv->map, psdm->reg_off, ®); sdm = PARM_GET(psdm->width, psdm->shift, reg); @@ -833,7 +833,7 @@ static ulong meson_clk_get_rate_by_id(struct clk *clk, unsigned long id) rate = meson_clk81_get_rate(clk); break; } - return -ENOENT; + return 0; } debug("clock %lu has rate %lu\n", id, rate); -- 2.47.3
