clk_get_rate() returns a ulong so do not attempt to pass negative error codes through it.
Signed-off-by: Andrew Goodbody <[email protected]> --- drivers/clk/renesas/clk-rcar-gen2.c | 8 ++++---- drivers/clk/renesas/rzg2l-cpg.c | 8 ++++---- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/clk/renesas/clk-rcar-gen2.c b/drivers/clk/renesas/clk-rcar-gen2.c index 9b6fce4675c018ad72eeefe3939bacbf65ffc428..4cdcc0fe71946d3055caae3ac7eb8e36c0b9b507 100644 --- a/drivers/clk/renesas/clk-rcar-gen2.c +++ b/drivers/clk/renesas/clk-rcar-gen2.c @@ -82,7 +82,7 @@ static ulong gen2_clk_get_rate(struct clk *clk) ret = renesas_clk_get_parent(clk, info, &parent); if (ret) { printf("%s[%i] parent fail, ret=%i\n", __func__, __LINE__, ret); - return ret; + return 0; } if (renesas_clk_is_mod(clk)) { @@ -94,7 +94,7 @@ static ulong gen2_clk_get_rate(struct clk *clk) ret = renesas_clk_get_core(clk, info, &core); if (ret) - return ret; + return 0; switch (core->type) { case CLK_TYPE_IN: @@ -112,7 +112,7 @@ static ulong gen2_clk_get_rate(struct clk *clk) return rate; } - return -EINVAL; + return 0; case CLK_TYPE_FF: rate = (gen2_clk_get_rate(&parent) * core->mult) / core->div; @@ -198,7 +198,7 @@ static ulong gen2_clk_get_rate(struct clk *clk) printf("%s[%i] unknown fail\n", __func__, __LINE__); - return -ENOENT; + return 0; } static int gen2_clk_setup_mmcif_div(struct clk *clk, ulong rate) diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c index 7fce1f70d13805fff452b60ce6ec16e4439e28d0..ecdd6c6e52695658d032b805425480cf60a1be59 100644 --- a/drivers/clk/renesas/rzg2l-cpg.c +++ b/drivers/clk/renesas/rzg2l-cpg.c @@ -225,7 +225,7 @@ static ulong rzg2l_core_clk_get_rate(struct udevice *dev, const struct cpg_core_ return rzg2l_div_clk_get_rate(dev, cc); default: dev_err(dev, "get_rate needed for clock %u, type %d\n", cc->id, cc->type); - return -ENOSYS; + return 0; } } @@ -244,7 +244,7 @@ static ulong rzg2l_cpg_clk_get_rate_by_id(struct udevice *dev, unsigned int id) } dev_err(dev, "Module clock ID %u not found\n", cpg_clk_id); - return -ENODEV; + return 0; } for (i = 0; i < data->info->num_core_clks; i++) { @@ -253,7 +253,7 @@ static ulong rzg2l_cpg_clk_get_rate_by_id(struct udevice *dev, unsigned int id) } dev_err(dev, "Core clock ID %u not found\n", cpg_clk_id); - return -ENODEV; + return 0; } static ulong rzg2l_cpg_clk_get_rate_by_name(struct udevice *dev, const char *name) @@ -272,7 +272,7 @@ static ulong rzg2l_cpg_clk_get_rate_by_name(struct udevice *dev, const char *nam } dev_err(dev, "Clock name %s not found\n", name); - return -EINVAL; + return 0; } static ulong rzg2l_cpg_clk_get_rate(struct clk *clk) -- 2.47.3
