Probe the mux device early in the SERDES configuration flow to ensure proper lane routing before PHY initialization. This is required for SoCs where SERDES lanes can be muxed between different controllers (PCIe, USB, etc), and different mux configurations are required between different boot phases.
Signed-off-by: Hrushikesh Salunke <[email protected]> --- drivers/pci_endpoint/pcie_cdns_ti_ep.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/pci_endpoint/pcie_cdns_ti_ep.c b/drivers/pci_endpoint/pcie_cdns_ti_ep.c index 541616ab7d0..dd3dc939a7e 100644 --- a/drivers/pci_endpoint/pcie_cdns_ti_ep.c +++ b/drivers/pci_endpoint/pcie_cdns_ti_ep.c @@ -97,9 +97,20 @@ static int pcie_cdns_reset(struct udevice *dev, struct power_domain *pci_pwrdmn) static int pcie_cdns_config_serdes(struct udevice *dev) { + int ret; + + if (CONFIG_IS_ENABLED(MUX_MMIO)) { + struct udevice *mux; + + ret = uclass_get_device_by_seq(UCLASS_MUX, 0, &mux); + if (ret) { + dev_err(dev, "unable to get mux\n"); + return ret; + } + } + if (CONFIG_IS_ENABLED(PHY_CADENCE_TORRENT)) { struct phy serdes; - int ret = 7; ret = generic_phy_get_by_name(dev, "pcie-phy", &serdes); if (ret != 0 && ret != -EBUSY) { -- 2.34.1
