TI's J784S4 SoC has two instances of PCIe Controller namely PCIe0 and PCIe1 which are Cadence PCIe Controllers. Enable corresponding configs to support PCIe Endpoint mode of operation on these instances.
Signed-off-by: Hrushikesh Salunke <[email protected]> --- configs/j784s4_evm_a72_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/j784s4_evm_a72_defconfig b/configs/j784s4_evm_a72_defconfig index 67aa18a16da..fc7acbae694 100644 --- a/configs/j784s4_evm_a72_defconfig +++ b/configs/j784s4_evm_a72_defconfig @@ -125,6 +125,8 @@ CONFIG_MUX_MMIO=y CONFIG_PHY_TI_DP83867=y CONFIG_PHY_FIXED=y CONFIG_TI_AM65_CPSW_NUSS=y +CONFIG_PCI_ENDPOINT=y +CONFIG_PCIE_CDNS_TI_EP=y CONFIG_PHY=y CONFIG_SPL_PHY=y CONFIG_PHY_CADENCE_TORRENT=y -- 2.34.1
