/****************************************************************/ This patch picked from [1] is just for test and can be ignored. dts/upstream should be synced regularly with devicetree-rebasing.
[1] https://lore.kernel.org/all/[email protected]/ /****************************************************************/ Some node in this file are not used by the upcoming VisionFive 2 Lite board. Move them to the board dts to prepare for adding the new VisionFive 2 Lite device tree. Signed-off-by: Hal Feng <[email protected]> --- .../src/riscv/starfive/jh7110-common.dtsi | 22 --------- .../jh7110-deepcomputing-fml13v01.dts | 49 +++++++++++++++++++ .../src/riscv/starfive/jh7110-milkv-mars.dts | 49 +++++++++++++++++++ .../riscv/starfive/jh7110-pine64-star64.dts | 49 +++++++++++++++++++ .../jh7110-starfive-visionfive-2.dtsi | 46 +++++++++++++++++ dts/upstream/src/riscv/starfive/jh7110.dtsi | 16 ------ 6 files changed, 193 insertions(+), 38 deletions(-) diff --git a/dts/upstream/src/riscv/starfive/jh7110-common.dtsi b/dts/upstream/src/riscv/starfive/jh7110-common.dtsi index 2eaf01775ef..8332622420c 100644 --- a/dts/upstream/src/riscv/starfive/jh7110-common.dtsi +++ b/dts/upstream/src/riscv/starfive/jh7110-common.dtsi @@ -281,15 +281,9 @@ assigned-clock-rates = <50000000>; bus-width = <8>; bootph-pre-ram; - cap-mmc-highspeed; - mmc-ddr-1_8v; - mmc-hs200-1_8v; - cap-mmc-hw-reset; post-power-on-delay-ms = <200>; pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins>; - vmmc-supply = <&vcc_3v3>; - vqmmc-supply = <&emmc_vdd>; status = "okay"; }; @@ -299,12 +293,7 @@ assigned-clock-rates = <50000000>; bus-width = <4>; bootph-pre-ram; - no-sdio; - no-mmc; - cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>; - disable-wp; cap-sd-highspeed; - post-power-on-delay-ms = <200>; pinctrl-names = "default"; pinctrl-0 = <&mmc1_pins>; status = "okay"; @@ -448,17 +437,6 @@ }; mmc0_pins: mmc0-0 { - rst-pins { - pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST, - GPOEN_ENABLE, - GPI_NONE)>; - bias-pull-up; - drive-strength = <12>; - input-disable; - input-schmitt-disable; - slew-rate = <0>; - }; - mmc-pins { pinmux = <PINMUX(PAD_SD0_CLK, 0)>, <PINMUX(PAD_SD0_CMD, 0)>, diff --git a/dts/upstream/src/riscv/starfive/jh7110-deepcomputing-fml13v01.dts b/dts/upstream/src/riscv/starfive/jh7110-deepcomputing-fml13v01.dts index f2857d021d6..5a2a41a7e8c 100644 --- a/dts/upstream/src/riscv/starfive/jh7110-deepcomputing-fml13v01.dts +++ b/dts/upstream/src/riscv/starfive/jh7110-deepcomputing-fml13v01.dts @@ -11,6 +11,55 @@ compatible = "deepcomputing,fml13v01", "starfive,jh7110"; }; +&cpu_opp { + opp-375000000 { + opp-hz = /bits/ 64 <375000000>; + opp-microvolt = <800000>; + }; + opp-500000000 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <800000>; + }; + opp-750000000 { + opp-hz = /bits/ 64 <750000000>; + opp-microvolt = <800000>; + }; + opp-1500000000 { + opp-hz = /bits/ 64 <1500000000>; + opp-microvolt = <1040000>; + }; +}; + +&mmc0 { + cap-mmc-highspeed; + cap-mmc-hw-reset; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&emmc_vdd>; +}; + +&mmc0_pins { + rst-pins { + pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST, + GPOEN_ENABLE, + GPI_NONE)>; + bias-pull-up; + drive-strength = <12>; + input-disable; + input-schmitt-disable; + slew-rate = <0>; + }; +}; + +&mmc1 { + no-sdio; + no-mmc; + cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>; + disable-wp; + post-power-on-delay-ms = <200>; +}; + &pcie1 { perst-gpios = <&sysgpio 21 GPIO_ACTIVE_LOW>; phys = <&pciephy1>; diff --git a/dts/upstream/src/riscv/starfive/jh7110-milkv-mars.dts b/dts/upstream/src/riscv/starfive/jh7110-milkv-mars.dts index fdaf6b4557d..96f6b2f072d 100644 --- a/dts/upstream/src/riscv/starfive/jh7110-milkv-mars.dts +++ b/dts/upstream/src/riscv/starfive/jh7110-milkv-mars.dts @@ -11,6 +11,25 @@ compatible = "milkv,mars", "starfive,jh7110"; }; +&cpu_opp { + opp-375000000 { + opp-hz = /bits/ 64 <375000000>; + opp-microvolt = <800000>; + }; + opp-500000000 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <800000>; + }; + opp-750000000 { + opp-hz = /bits/ 64 <750000000>; + opp-microvolt = <800000>; + }; + opp-1500000000 { + opp-hz = /bits/ 64 <1500000000>; + opp-microvolt = <1040000>; + }; +}; + &gmac0 { assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>; assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>; @@ -22,6 +41,36 @@ status = "okay"; }; +&mmc0 { + cap-mmc-highspeed; + cap-mmc-hw-reset; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&emmc_vdd>; +}; + +&mmc0_pins { + rst-pins { + pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST, + GPOEN_ENABLE, + GPI_NONE)>; + bias-pull-up; + drive-strength = <12>; + input-disable; + input-schmitt-disable; + slew-rate = <0>; + }; +}; + +&mmc1 { + no-sdio; + no-mmc; + cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>; + disable-wp; + post-power-on-delay-ms = <200>; +}; + &pcie0 { status = "okay"; }; diff --git a/dts/upstream/src/riscv/starfive/jh7110-pine64-star64.dts b/dts/upstream/src/riscv/starfive/jh7110-pine64-star64.dts index 31e825be206..c9677aef9ff 100644 --- a/dts/upstream/src/riscv/starfive/jh7110-pine64-star64.dts +++ b/dts/upstream/src/riscv/starfive/jh7110-pine64-star64.dts @@ -14,6 +14,25 @@ }; }; +&cpu_opp { + opp-375000000 { + opp-hz = /bits/ 64 <375000000>; + opp-microvolt = <800000>; + }; + opp-500000000 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <800000>; + }; + opp-750000000 { + opp-hz = /bits/ 64 <750000000>; + opp-microvolt = <800000>; + }; + opp-1500000000 { + opp-hz = /bits/ 64 <1500000000>; + opp-microvolt = <1040000>; + }; +}; + &gmac0 { starfive,tx-use-rgmii-clk; assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>; @@ -44,6 +63,36 @@ status = "okay"; }; +&mmc0 { + cap-mmc-highspeed; + cap-mmc-hw-reset; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&emmc_vdd>; +}; + +&mmc0_pins { + rst-pins { + pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST, + GPOEN_ENABLE, + GPI_NONE)>; + bias-pull-up; + drive-strength = <12>; + input-disable; + input-schmitt-disable; + slew-rate = <0>; + }; +}; + +&mmc1 { + no-sdio; + no-mmc; + cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>; + disable-wp; + post-power-on-delay-ms = <200>; +}; + &pcie1 { status = "okay"; }; diff --git a/dts/upstream/src/riscv/starfive/jh7110-starfive-visionfive-2.dtsi b/dts/upstream/src/riscv/starfive/jh7110-starfive-visionfive-2.dtsi index 5f14afb2c24..d1e4206f125 100644 --- a/dts/upstream/src/riscv/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/dts/upstream/src/riscv/starfive/jh7110-starfive-visionfive-2.dtsi @@ -13,6 +13,25 @@ }; }; +&cpu_opp { + opp-375000000 { + opp-hz = /bits/ 64 <375000000>; + opp-microvolt = <800000>; + }; + opp-500000000 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <800000>; + }; + opp-750000000 { + opp-hz = /bits/ 64 <750000000>; + opp-microvolt = <800000>; + }; + opp-1500000000 { + opp-hz = /bits/ 64 <1500000000>; + opp-microvolt = <1040000>; + }; +}; + &gmac0 { status = "okay"; }; @@ -38,9 +57,36 @@ }; &mmc0 { + cap-mmc-highspeed; + cap-mmc-hw-reset; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&emmc_vdd>; non-removable; }; +&mmc0_pins { + rst-pins { + pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST, + GPOEN_ENABLE, + GPI_NONE)>; + bias-pull-up; + drive-strength = <12>; + input-disable; + input-schmitt-disable; + slew-rate = <0>; + }; +}; + +&mmc1 { + no-sdio; + no-mmc; + cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>; + disable-wp; + post-power-on-delay-ms = <200>; +}; + &pcie0 { status = "okay"; }; diff --git a/dts/upstream/src/riscv/starfive/jh7110.dtsi b/dts/upstream/src/riscv/starfive/jh7110.dtsi index 0ba74ef0467..d2463399b95 100644 --- a/dts/upstream/src/riscv/starfive/jh7110.dtsi +++ b/dts/upstream/src/riscv/starfive/jh7110.dtsi @@ -200,22 +200,6 @@ cpu_opp: opp-table-0 { compatible = "operating-points-v2"; opp-shared; - opp-375000000 { - opp-hz = /bits/ 64 <375000000>; - opp-microvolt = <800000>; - }; - opp-500000000 { - opp-hz = /bits/ 64 <500000000>; - opp-microvolt = <800000>; - }; - opp-750000000 { - opp-hz = /bits/ 64 <750000000>; - opp-microvolt = <800000>; - }; - opp-1500000000 { - opp-hz = /bits/ 64 <1500000000>; - opp-microvolt = <1040000>; - }; }; thermal-zones { -- 2.43.2
