From: Raymond Mao <[email protected]> Enable CONFIG_TIMER_EARLY to allow udelay() calls during early initialization phases. This is required for proper timing operations before the full timer driver is available.
Signed-off-by: Raymond Mao <[email protected]> --- configs/k1_defconfig | 2 ++ include/configs/k1.h | 4 ++++ 2 files changed, 6 insertions(+) diff --git a/configs/k1_defconfig b/configs/k1_defconfig index f1a16735943..ca9c1d0bd8d 100644 --- a/configs/k1_defconfig +++ b/configs/k1_defconfig @@ -20,6 +20,7 @@ CONFIG_SYS_BOOTM_LEN=0xa000000 CONFIG_SYS_LOAD_ADDR=0x200000 CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y +CONFIG_SPL_RISCV_SMODE=y CONFIG_ARCH_K1=y CONFIG_TARGET_BANANAPI_F3=y CONFIG_FIT=y @@ -42,3 +43,4 @@ CONFIG_DEBUG_UART_SHIFT=2 CONFIG_DEBUG_UART_NS16550=y CONFIG_DEBUG_UART_ANNOUNCE=y # CONFIG_DEBUG_SBI_CONSOLE is not set +CONFIG_TIMER_EARLY=y diff --git a/include/configs/k1.h b/include/configs/k1.h index 6a26fdfcebe..d46fec8b251 100644 --- a/include/configs/k1.h +++ b/include/configs/k1.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (c) 2024, Kongyang Liu <[email protected]> + * Copyright (c) 2025-2026, RISCStar Ltd. * */ @@ -12,4 +13,7 @@ #define CFG_SYS_SDRAM_BASE 0x0 #define CFG_SYS_NS16550_IER 0x40 /* UART Unit Enable */ +#define RISCV_MMODE_TIMER_FREQ 24000000 +#define RISCV_SMODE_TIMER_FREQ 24000000 + #endif /* __CONFIG_H */ -- 2.25.1
