From: Raymond Mao <[email protected]> Include DDR initialization firmware in the SPL image. The firmware path can be specified via the DDR_FW_FILE environment variable. If the firmware is not found, an empty placeholder file is created to allow the build to proceed without DDR initialization support.
Signed-off-by: Raymond Mao <[email protected]> --- arch/riscv/dts/k1-spl.dts | 34 ++++++++++++++++++++++++++++++++- board/spacemit/k1/Kconfig | 8 ++++++++ board/spacemit/k1/Makefile | 19 ++++++++++++++++++ board/spacemit/k1/spl.c | 30 +++++++++++++++++++++++++++++ include/configs/k1.h | 3 +++ lib/vendor/spacemit/ddr_fw.bin | Bin 0 -> 19416 bytes 6 files changed, 93 insertions(+), 1 deletion(-) create mode 100644 lib/vendor/spacemit/ddr_fw.bin diff --git a/arch/riscv/dts/k1-spl.dts b/arch/riscv/dts/k1-spl.dts index cd7875f3e35..f8b280fa96f 100644 --- a/arch/riscv/dts/k1-spl.dts +++ b/arch/riscv/dts/k1-spl.dts @@ -7,7 +7,6 @@ /dts-v1/; #include "k1.dtsi" -#include "binman.dtsi" / { model = "spacemit k1 spl"; @@ -21,6 +20,39 @@ stdout-path = "serial0:115200n8"; bootph-all; }; + + binman { + section { + filename = "u-boot-spl-ddr.bin"; + pad-byte = <0xff>; + align-size = <4>; + align = <4>; + + spl_section: section { + type = "section"; + size = <CONFIG_SPL_DDR_FIRMWARE_OFFSET>; + + u-boot-spl-nodtb { + type = "blob"; + filename = "spl/u-boot-spl.bin"; + align-end = <4>; + }; + + u-boot-spl-dtb { + type = "blob"; + filename = "spl/u-boot-spl.dtb"; + align-end = <4>; + }; + }; + + ddr_fw: ddr-firmware { + type = "blob"; + offset = <CONFIG_SPL_DDR_FIRMWARE_OFFSET>; + filename = "lib/vendor/spacemit/ddr_fw.bin"; + align-end = <4>; + }; + }; + }; }; &vctcxo_1m { diff --git a/board/spacemit/k1/Kconfig b/board/spacemit/k1/Kconfig index 9f9c806d00d..a5fa788f660 100644 --- a/board/spacemit/k1/Kconfig +++ b/board/spacemit/k1/Kconfig @@ -15,6 +15,14 @@ config SYS_CONFIG_NAME config TEXT_BASE default 0x00200000 +config SPL_DDR_FIRMWARE_OFFSET + hex "DDR firmware offset in SPL image" + depends on SPL + default 0x20000 + help + Offset where DDR firmware should be placed in the SPL + image. + config SPL_OPENSBI_LOAD_ADDR default 0x00000000 diff --git a/board/spacemit/k1/Makefile b/board/spacemit/k1/Makefile index 7bce47bac8c..ebe6e55867c 100644 --- a/board/spacemit/k1/Makefile +++ b/board/spacemit/k1/Makefile @@ -5,3 +5,22 @@ obj-y := board.o obj-$(CONFIG_SPL_BUILD) += spl.o + +DDR_FW_SRC ?= $(DDR_FW_FILE) +FW_TARGET = $(srctree)/lib/vendor/spacemit/ddr_fw.bin + +DDR_FW_HEADER = $(objtree)/include/generated/ddr_fw_info.h + +$(obj)/spl.o: $(DDR_FW_HEADER) + +$(DDR_FW_HEADER): $(FW_TARGET) + @echo "/* DDR firmware info - $$(date) */" > $@ + @if [ -f "$(FW_TARGET)" ]; then \ + SIZE=$$(stat -c%s "$(FW_TARGET)" 2>/dev/null || echo 0); \ + else \ + SIZE=0; \ + fi; \ + echo "#define DDR_FW_FILE_SIZE $$SIZE" >> $@ + @echo "/* Note: Update ADDR if binman layout changes */" >> $@ + +clean-files += $(FW_TARGET) $(DDR_FW_HEADER) diff --git a/board/spacemit/k1/spl.c b/board/spacemit/k1/spl.c index 6fe064bd430..54bad9000fe 100644 --- a/board/spacemit/k1/spl.c +++ b/board/spacemit/k1/spl.c @@ -6,10 +6,12 @@ #include <asm/io.h> #include <clk.h> #include <clk-uclass.h> +#include <cpu_func.h> #include <configs/k1.h> #include <dm/device.h> #include <dm/uclass.h> #include <dt-bindings/pinctrl/k1-pinctrl.h> +#include <generated/ddr_fw_info.h> #include <i2c.h> #include <linux/delay.h> #include <log.h> @@ -115,6 +117,33 @@ void serial_early_init(void) panic("Serial uclass init failed: %d\n", ret); } +/* Load DDR training firmware */ +int init_ddr_firmware(void) +{ + void __iomem *src, *dst; + unsigned long size; + + src = (void __iomem *)(CONFIG_SPL_TEXT_BASE + + CONFIG_SPL_DDR_FIRMWARE_OFFSET); + dst = (void __iomem *)(DDR_TRAINING_DATA_BASE); + memcpy(dst, src, DDR_FW_FILE_SIZE); + size = round_up(DDR_FW_FILE_SIZE, 64); + flush_dcache_range((u32)(u64)dst, (u32)(u64)dst + size); + return 0; +} + +void ddr_early_init(void) +{ + void __iomem *addr; + + init_ddr_firmware(); + addr = (void __iomem *)(CONFIG_SPL_TEXT_BASE + + CONFIG_SPL_DDR_FIRMWARE_OFFSET); + // verify DDR firmware header + log_info("[0x%x]:0x%x, firmware size:%d\n", + (uint)(u64)addr, readl(addr), DDR_FW_FILE_SIZE); +} + void board_init_f(ulong dummy) { u8 i2c_buf[I2C_BUF_SIZE]; @@ -138,6 +167,7 @@ void board_init_f(ulong dummy) log_info("Fail to detect board:%d\n", ret); else log_info("Get board name:%s\n", (char *)i2c_buf); + ddr_early_init(); } u32 spl_boot_device(void) diff --git a/include/configs/k1.h b/include/configs/k1.h index d46fec8b251..4cefdf7c725 100644 --- a/include/configs/k1.h +++ b/include/configs/k1.h @@ -16,4 +16,7 @@ #define RISCV_MMODE_TIMER_FREQ 24000000 #define RISCV_SMODE_TIMER_FREQ 24000000 +#define DDR_TRAINING_DATA_BASE 0xC0832000 +#define DDR_TRAINING_INFO_BUFF 0xC0800000 + #endif /* __CONFIG_H */ diff --git a/lib/vendor/spacemit/ddr_fw.bin b/lib/vendor/spacemit/ddr_fw.bin new file mode 100644 index 0000000000000000000000000000000000000000..cefecae24977ee76c74e6f3b658adc6a81984640 GIT binary patch literal 19416 zcmc&*3vgT2nZAl7U!cPh)(Zj>rozHjU?_DGa3Hfu9b!i?Q<mkmz;swJvMkaDCw80{ zTc~YWzBrx0B&H~--Hl_%*ks!*gfyPGlR$`#x(}8T*mXnOO@d=C?Nai<_$kTz{pZ|s z@72?CfL+fdx;p1S|Lgp(^WURQRXM|XXQiuLf4w^rSkw@0^|}g%WAwC3#`E?3`3ODd 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