From: Du Huanpeng <[email protected]>

supports watchdog in loongson mips embedded SoCs

Signed-off-by: Du Huanpeng <[email protected]>
---
 drivers/watchdog/Kconfig        |   8 ++
 drivers/watchdog/Makefile       |   1 +
 drivers/watchdog/loongson_wdt.c | 127 ++++++++++++++++++++++++++++++++
 3 files changed, 136 insertions(+)
 create mode 100644 drivers/watchdog/loongson_wdt.c

diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 35ae7d106b1..63bf0e04c80 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -213,6 +213,14 @@ config SPL_WDT_GPIO
        help
          Support for external watchdog fed by toggling a gpio in SPL.
 
+config WDT_LOONGSON
+       bool "Loongson MIPS watchdog timer support"
+       depends on WDT
+       help
+         Select this to enable watchdog timer for Loongson SoCs.
+         The watchdog timer is stopped when initialized.
+         It performs full SoC reset.
+
 config WDT_MAX6370
        bool "MAX6370 watchdog timer support"
        depends on WDT
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 02e2674f8af..e9ffb417050 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -33,6 +33,7 @@ obj-$(CONFIG_WDT_DA9063) += da9063-wdt.o
 obj-$(CONFIG_WDT_DAVINCI) += davinci_wdt.o
 obj-$(CONFIG_WDT_FTWDT010) += ftwdt010_wdt.o
 obj-$(CONFIG_$(SPL_TPL_)WDT_GPIO) += gpio_wdt.o
+obj-$(CONFIG_WDT_LOONGSON) += loongson_wdt.o
 obj-$(CONFIG_WDT_MAX6370) += max6370_wdt.o
 obj-$(CONFIG_WDT_MCF) += mcf_wdt.o
 obj-$(CONFIG_WDT_MESON_GXBB) += meson_gxbb_wdt.o
diff --git a/drivers/watchdog/loongson_wdt.c b/drivers/watchdog/loongson_wdt.c
new file mode 100644
index 00000000000..4d34d70296e
--- /dev/null
+++ b/drivers/watchdog/loongson_wdt.c
@@ -0,0 +1,127 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Watchdog driver for MediaTek SoCs
+ *
+ * Copyright (C) 2018 MediaTek Inc.
+ * Author: Ryder Lee <[email protected]>
+ *
+ * based on: drivers/watchdog/mtk_wdt.c
+ * Copyright (C) 2020-2026 Du Huanpeng <[email protected]>
+ */
+
+#include <dm.h>
+#include <hang.h>
+#include <wdt.h>
+#include <asm/io.h>
+#include <clk.h>
+#include <dm/device_compat.h>
+#include <linux/time.h>
+
+struct loongson_wdt_priv {
+       void __iomem *base;
+#define WDT_EN         0
+#define WDT_TIMER      4
+#define WDT_SET                8
+       ulong clock;
+       unsigned long timeout;
+};
+
+static int loongson_wdt_reset(struct udevice *dev)
+{
+       struct loongson_wdt_priv *priv = dev_get_priv(dev);
+
+       writel(priv->timeout, priv->base + WDT_TIMER);
+       writel(1, priv->base + WDT_SET);
+
+       return 0;
+}
+
+static int loongson_wdt_stop(struct udevice *dev)
+{
+       struct loongson_wdt_priv *priv = dev_get_priv(dev);
+
+       writel(0, priv->base + WDT_EN);
+       return 0;
+}
+
+static int loongson_wdt_expire_now(struct udevice *dev, ulong flags)
+{
+       struct loongson_wdt_priv *priv = dev_get_priv(dev);
+
+       writel(1, priv->base + WDT_EN);
+       writel(1, priv->base + WDT_TIMER);
+       writel(1, priv->base + WDT_SET);
+
+       hang();
+       return 0;
+}
+
+static int loongson_wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags)
+{
+       struct loongson_wdt_priv *priv = dev_get_priv(dev);
+       unsigned int timeout;
+
+       timeout = U32_MAX / (priv->clock / MSEC_PER_SEC);
+
+       if (timeout < timeout_ms)
+               timeout = U32_MAX;
+       else
+               timeout = timeout_ms * (priv->clock / MSEC_PER_SEC);
+
+       debug("WDT: reload  = %08x\n", timeout);
+
+       writel(1, priv->base + WDT_EN);
+       writel(timeout, priv->base + WDT_TIMER);
+       writel(1, priv->base + WDT_SET);
+
+       priv->timeout = timeout;
+
+       return 0;
+}
+
+static int loongson_wdt_probe(struct udevice *dev)
+{
+       struct loongson_wdt_priv *priv = dev_get_priv(dev);
+       struct clk cl;
+       ulong clock;
+
+       priv->base = dev_remap_addr(dev);
+       if (!priv->base)
+               return -ENOENT;
+
+       if (clk_get_by_index(dev, 0, &cl) == 0)
+               clock = clk_get_rate(&cl);
+
+       debug("WDT: clock = %ld\n", clock);
+
+       if (IS_ERR_VALUE(clock)) {
+               dev_err(dev, "failed to get rate\n");
+               return clock;
+       }
+
+       priv->clock = clock;
+       writel(0, priv->base + WDT_EN);
+       return 0;
+}
+
+static const struct wdt_ops loongson_wdt_ops = {
+       .start = loongson_wdt_start,
+       .reset = loongson_wdt_reset,
+       .stop = loongson_wdt_stop,
+       .expire_now = loongson_wdt_expire_now,
+};
+
+static const struct udevice_id loongson_wdt_ids[] = {
+       { .compatible = "loongson,ls1c300-wdt"},
+       {}
+};
+
+U_BOOT_DRIVER(loongson_wdt) = {
+       .name = "loongson_wdt",
+       .id = UCLASS_WDT,
+       .of_match = loongson_wdt_ids,
+       .priv_auto = sizeof(struct loongson_wdt_priv),
+       .probe = loongson_wdt_probe,
+       .ops = &loongson_wdt_ops,
+       .flags = DM_FLAG_PRE_RELOC,
+};
-- 
2.43.0

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