On 5/8/2026 7:55 PM, Neha Malcom Francis wrote:
> The shadow copies of WAY_SELECT MSMC MMRs have incorrect reset values.
> The main copy has the correct reset value but MSMC functionality uses
> the shadow copy values. This incorrect reset value results in
> under-utilization of MSMC L3 data cache and snoop filter for DDR
> accesses.
>
Thanks Neha for rolling this out. Wondering if L3 set to zero then
will this hardcoded write will impact in some way ?
> The workaround is to write 0x00000303 to both MSMC MMRs after reset.
> This ensures that their shadow copies get the correct post-reset value.
>
> Link: https://www.ti.com/lit/er/sprz530c/sprz530c.pdf
> Link: https://www.ti.com/lit/er/sprz536b/sprz536b.pdf
> Signed-off-by: Neha Malcom Francis <[email protected]>
> ---
> arch/arm/mach-k3/include/mach/j721s2_hardware.h | 4 ++++
> arch/arm/mach-k3/include/mach/j784s4_hardware.h | 4 ++++
> arch/arm/mach-k3/j721s2/j721s2_init.c | 11 +++++++++++
> arch/arm/mach-k3/j784s4/j784s4_init.c | 11 +++++++++++
> 4 files changed, 30 insertions(+)
>
> diff --git a/arch/arm/mach-k3/include/mach/j721s2_hardware.h
> b/arch/arm/mach-k3/include/mach/j721s2_hardware.h
> index 82f076a45e0..a4d7fe48662 100644
> --- a/arch/arm/mach-k3/include/mach/j721s2_hardware.h
> +++ b/arch/arm/mach-k3/include/mach/j721s2_hardware.h
> @@ -37,6 +37,10 @@
> /* MCU SCRATCHPAD usage */
> #define TI_SRAM_SCRATCH_BOARD_EEPROM_START
> CONFIG_SYS_K3_MCU_SCRATCHPAD_BASE
>
> +/* MSMC RT_WAY MMR addresses */
> +#define K3_MSMC_RT_WAY_SELECT 0x6E008000
> +#define K3_MSMC_NRT_WAY_SELECT 0x6E008008
> +
> #if defined(CONFIG_SYS_K3_SPL_ATF) && !defined(__ASSEMBLY__)
>
> #define J721S2_DEV_MCU_RTI0 295
> diff --git a/arch/arm/mach-k3/include/mach/j784s4_hardware.h
> b/arch/arm/mach-k3/include/mach/j784s4_hardware.h
> index 29a894baed3..bb5c58d00e4 100644
> --- a/arch/arm/mach-k3/include/mach/j784s4_hardware.h
> +++ b/arch/arm/mach-k3/include/mach/j784s4_hardware.h
> @@ -37,6 +37,10 @@
> /* MCU SCRATCHPAD usage */
> #define TI_SRAM_SCRATCH_BOARD_EEPROM_START
> CONFIG_SYS_K3_MCU_SCRATCHPAD_BASE
>
> +/* MSMC RT_WAY MMR addresses */
> +#define K3_MSMC_RT_WAY_SELECT 0x6E008000
> +#define K3_MSMC_NRT_WAY_SELECT 0x6E008008
> +
> #if defined(CONFIG_SYS_K3_SPL_ATF) && !defined(__ASSEMBLY__)
>
> #define J784S4_DEV_MCU_RTI0 367
> diff --git a/arch/arm/mach-k3/j721s2/j721s2_init.c
> b/arch/arm/mach-k3/j721s2/j721s2_init.c
> index b5453d8895d..d996dfcc332 100644
> --- a/arch/arm/mach-k3/j721s2/j721s2_init.c
> +++ b/arch/arm/mach-k3/j721s2/j721s2_init.c
> @@ -163,6 +163,14 @@ static void store_boot_info_from_rom(void)
> sizeof(struct rom_extended_boot_data));
> }
>
> +void apply_msmc_shadow_copy_errata(void)
> +{
> + /* Errata i2378: Write 0x00000303 to MSMC shadow copy MMRs */
> + writel(0x00000303, K3_MSMC_RT_WAY_SELECT);
> + writel(0x00000303, K3_MSMC_NRT_WAY_SELECT);
> + debug("%s: Applied errata i2378\n", __func__);
> +}
> +
> void k3_spl_init(void)
> {
> struct udevice *dev;
> @@ -176,6 +184,9 @@ void k3_spl_init(void)
> /* Make all control module registers accessible */
> ctrl_mmr_unlock();
>
> + /* Apply MSMC shadow copy errata workaround */
> + apply_msmc_shadow_copy_errata();
> +
> if (IS_ENABLED(CONFIG_CPU_V7R)) {
> disable_linefill_optimization();
> setup_k3_mpu_regions();
> diff --git a/arch/arm/mach-k3/j784s4/j784s4_init.c
> b/arch/arm/mach-k3/j784s4/j784s4_init.c
> index 53f152ccd9c..48b52fcb333 100644
> --- a/arch/arm/mach-k3/j784s4/j784s4_init.c
> +++ b/arch/arm/mach-k3/j784s4/j784s4_init.c
> @@ -180,6 +180,14 @@ static void store_boot_info_from_rom(void)
> sizeof(struct rom_extended_boot_data));
> }
>
> +void apply_msmc_shadow_copy_errata(void)
> +{
> + /* Errata i2378: Write 0x00000303 to MSMC shadow copy MMRs */
> + writel(0x00000303, K3_MSMC_RT_WAY_SELECT);
> + writel(0x00000303, K3_MSMC_NRT_WAY_SELECT);
> + debug("%s: Applied errata i2378\n", __func__);
> +}
> +
> void k3_spl_init(void)
> {
> struct udevice *dev;
> @@ -194,6 +202,9 @@ void k3_spl_init(void)
> /* Make all control module registers accessible */
> ctrl_mmr_unlock();
>
> + /* Apply MSMC shadow copy errata workaround */
> + apply_msmc_shadow_copy_errata();
> +
> if (IS_ENABLED(CONFIG_CPU_V7R)) {
> disable_linefill_optimization();
> setup_k3_mpu_regions();
