On Fri, 08 May 2026 19:55:07 +0530, Neha Malcom Francis <[email protected]> wrote: > The shadow copies of WAY_SELECT MSMC MMRs have incorrect reset values. > The main copy has the correct reset value but MSMC functionality uses > the shadow copy values. This incorrect reset value results in > under-utilization of MSMC L3 data cache and snoop filter for DDR > accesses. > > The workaround is to write 0x00000303 to both MSMC MMRs after reset. > This ensures that their shadow copies get the correct post-reset value. > > Link: https://www.ti.com/lit/er/sprz530c/sprz530c.pdf > Link: https://www.ti.com/lit/er/sprz536b/sprz536b.pdf > Signed-off-by: Neha Malcom Francis <[email protected]>
Please ignore this patch. This errata workaround is better fixed in internal firmware than here. -- Neha Malcom Francis <[email protected]>
