From: Peng Fan <[email protected]> The U-Boot copy of the board device trees for this board is same as the ones in dts/upstream, so switch to the board to OF_UPSTREAM, by dropping the U-Boot copies and selecting OF_UPSTREAM.
Signed-off-by: Peng Fan <[email protected]> --- arch/arm/dts/Makefile | 1 - arch/arm/dts/imx8mp-icore-mx8mp-edimm2.2.dts | 175 ------------------------ arch/arm/dts/imx8mp-icore-mx8mp.dtsi | 186 -------------------------- arch/arm/mach-imx/imx8m/Kconfig | 1 + configs/imx8mp-icore-mx8mp-edimm2.2_defconfig | 2 +- 5 files changed, 2 insertions(+), 363 deletions(-) diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 58a6be9c060..dacea5487c6 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -885,7 +885,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \ imx8mp-dhcom-drc02.dtb \ imx8mp-dhcom-pdk3-overlay-rev100.dtbo \ imx8mp-dhcom-picoitx.dtb \ - imx8mp-icore-mx8mp-edimm2.2.dtb \ imx8mp-msc-sm2s.dtb dtb-$(CONFIG_ARCH_IMX9) += \ diff --git a/arch/arm/dts/imx8mp-icore-mx8mp-edimm2.2.dts b/arch/arm/dts/imx8mp-icore-mx8mp-edimm2.2.dts deleted file mode 100644 index a02b31c42db..00000000000 --- a/arch/arm/dts/imx8mp-icore-mx8mp-edimm2.2.dts +++ /dev/null @@ -1,175 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2018 NXP - * Copyright (c) 2019 Engicam srl - * Copyright (c) 2020 Amarula Solutions(India) - */ - -/dts-v1/; - -#include "imx8mp.dtsi" -#include "imx8mp-icore-mx8mp.dtsi" -#include <dt-bindings/usb/pd.h> - -/ { - model = "Engicam i.Core MX8M Plus EDIMM2.2 Starter Kit"; - compatible = "engicam,icore-mx8mp-edimm2.2", "engicam,icore-mx8mp", - "fsl,imx8mp"; - - chosen { - stdout-path = &uart2; - }; - - reg_usb1_vbus: regulator-usb1 { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_reg_usb1>; - regulator-max-microvolt = <5000000>; - regulator-min-microvolt = <5000000>; - regulator-name = "usb1_host_vbus"; - }; - - reg_usdhc2_vmmc: regulator-usdhc2 { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; - regulator-max-microvolt = <3300000>; - regulator-min-microvolt = <3300000>; - regulator-name = "VSD_3V3"; - }; -}; - -/* Ethernet */ -&eqos { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_eqos>; - phy-handle = <ðphy0>; - phy-mode = "rgmii-id"; - status = "okay"; - - mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - - ethphy0: ethernet-phy@7 { - compatible = "ethernet-phy-ieee802.3-c22"; - micrel,led-mode = <0>; - reg = <7>; - }; - }; -}; - -/* console */ -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; - status = "okay"; -}; - -&usb3_phy0 { - status = "okay"; -}; - -&usb3_0 { - status = "okay"; -}; - -&usb_dwc3_0 { - dr_mode = "host"; - status = "okay"; -}; - -&usb3_phy1 { - status = "okay"; -}; - -&usb3_1 { - status = "okay"; -}; - -&usb_dwc3_1 { - dr_mode = "host"; - status = "okay"; -}; - -/* SDCARD */ -&usdhc2 { - cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; - bus-width = <4>; - pinctrl-names = "default" ; - pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; - vmmc-supply = <®_usdhc2_vmmc>; - status = "okay"; -}; - -&iomuxc { - pinctrl_eqos: eqosgrp { - fsl,pins = < - MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x2 - MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO 0x2 - MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 0x90 - MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1 0x90 - MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2 0x90 - MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3 0x90 - MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x90 - MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x90 - MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0 0x16 - MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1 0x16 - MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2 0x16 - MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 0x16 - MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x16 - MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x16 - MX8MP_IOMUXC_NAND_DATA01__GPIO3_IO07 0x10 - >; - }; - - pinctrl_uart2: uart2grp { - fsl,pins = < - MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x40 - MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x40 - >; - }; - - pinctrl_uart3: uart3grp { - fsl,pins = < - MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX 0x140 - MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX 0x140 - MX8MP_IOMUXC_SD1_STROBE__UART3_DCE_CTS 0x140 - >; - }; - - pinctrl_usdhc2: usdhc2grp { - fsl,pins = < - MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190 - MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0 - MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0 - MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0 - MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0 - MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0 - MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0 - >; - }; - - pinctrl_usdhc2_gpio: usdhc2gpiogrp { - fsl,pins = < - MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4 - >; - }; - - pinctrl_reg_usb1: regusb1grp { - fsl,pins = < - MX8MP_IOMUXC_GPIO1_IO14__GPIO1_IO14 0x10 - >; - }; - - pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { - fsl,pins = < - MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x40 - >; - }; -}; diff --git a/arch/arm/dts/imx8mp-icore-mx8mp.dtsi b/arch/arm/dts/imx8mp-icore-mx8mp.dtsi deleted file mode 100644 index a6319824ea2..00000000000 --- a/arch/arm/dts/imx8mp-icore-mx8mp.dtsi +++ /dev/null @@ -1,186 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2018 NXP - * Copyright (c) 2019 Engicam srl - * Copyright (c) 2020 Amarula Solutions(India) - */ - -/ { - compatible = "engicam,icore-mx8mp", "fsl,imx8mp"; -}; - -&A53_0 { - cpu-supply = <&buck2>; -}; - -&A53_1 { - cpu-supply = <&buck2>; -}; - -&A53_2 { - cpu-supply = <&buck2>; -}; - -&A53_3 { - cpu-supply = <&buck2>; -}; - -&i2c1 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1>; - status = "okay"; - - pca9450: pmic@25 { - compatible = "nxp,pca9450c"; - interrupt-parent = <&gpio3>; - interrupts = <1 IRQ_TYPE_LEVEL_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pmic>; - reg = <0x25>; - - regulators { - buck1: BUCK1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <720000>; - regulator-max-microvolt = <1000000>; - regulator-name = "BUCK1"; - regulator-ramp-delay = <3125>; - }; - - buck2: BUCK2 { - nxp,dvs-run-voltage = <950000>; - nxp,dvs-standby-voltage = <850000>; - regulator-always-on; - regulator-boot-on; - regulator-max-microvolt = <1025000>; - regulator-min-microvolt = <720000>; - regulator-name = "BUCK2"; - regulator-ramp-delay = <3125>; - }; - - buck4: BUCK4 { - regulator-always-on; - regulator-boot-on; - regulator-max-microvolt = <3600000>; - regulator-min-microvolt = <3000000>; - regulator-name = "BUCK4"; - }; - - buck5: BUCK5 { - regulator-always-on; - regulator-boot-on; - regulator-max-microvolt = <1950000>; - regulator-min-microvolt = <1650000>; - regulator-name = "BUCK5"; - }; - - buck6: BUCK6 { - regulator-always-on; - regulator-boot-on; - regulator-max-microvolt = <1155000>; - regulator-min-microvolt = <1045000>; - regulator-name = "BUCK6"; - }; - - ldo1: LDO1 { - regulator-always-on; - regulator-boot-on; - regulator-max-microvolt = <1950000>; - regulator-min-microvolt = <1650000>; - regulator-name = "LDO1"; - }; - - ldo3: LDO3 { - regulator-always-on; - regulator-boot-on; - regulator-max-microvolt = <1890000>; - regulator-min-microvolt = <1710000>; - regulator-name = "LDO3"; - }; - - ldo5: LDO5 { - regulator-always-on; - regulator-boot-on; - regulator-max-microvolt = <3300000>; - regulator-min-microvolt = <1800000>; - regulator-name = "LDO5"; - }; - }; - }; -}; - -/* EMMC */ -&usdhc3 { - bus-width = <8>; - non-removable; - pinctrl-names = "default", "state_100mhz", "state_200mhz"; - pinctrl-0 = <&pinctrl_usdhc3>; - pinctrl-1 = <&pinctrl_usdhc3_100mhz>; - pinctrl-2 = <&pinctrl_usdhc3_200mhz>; - status = "okay"; -}; - -&iomuxc { - pinctrl_i2c1: i2c1grp { - fsl,pins = < - MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c3 - MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c3 - >; - }; - - pinctrl_pmic: pmicgrp { - fsl,pins = < - MX8MP_IOMUXC_NAND_CE0_B__GPIO3_IO01 0x41 - >; - }; - - pinctrl_usdhc3: usdhc3grp { - fsl,pins = < - MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190 - MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0 - MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d0 - MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d0 - MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d0 - MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d0 - MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d0 - MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d0 - MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d0 - MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d0 - MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x190 - >; - }; - - pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { - fsl,pins = < - MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194 - MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4 - MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d4 - MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d4 - MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d4 - MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d4 - MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d4 - MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d4 - MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d4 - MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d4 - MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x194 - >; - }; - - pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { - fsl,pins = < - MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x196 - MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d6 - MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d6 - MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d6 - MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d6 - MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d6 - MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d6 - MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d6 - MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d6 - MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d6 - MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x196 - >; - }; -}; diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig index 936d550588f..aa8783e971b 100644 --- a/arch/arm/mach-imx/imx8m/Kconfig +++ b/arch/arm/mach-imx/imx8m/Kconfig @@ -264,6 +264,7 @@ config TARGET_IMX8MP_ICORE_MX8MP select IMX8MP select IMX8M_LPDDR4 select SUPPORT_SPL + imply OF_UPSTREAM help i.Core MX8M Plus is an EDIMM SOM based on NXP i.MX8MP. diff --git a/configs/imx8mp-icore-mx8mp-edimm2.2_defconfig b/configs/imx8mp-icore-mx8mp-edimm2.2_defconfig index 45edb66f161..709f9f5c7d1 100644 --- a/configs/imx8mp-icore-mx8mp-edimm2.2_defconfig +++ b/configs/imx8mp-icore-mx8mp-edimm2.2_defconfig @@ -7,7 +7,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x400000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="imx8mp-icore-mx8mp-edimm2.2" +CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-icore-mx8mp-edimm2.2" CONFIG_TARGET_IMX8MP_ICORE_MX8MP=y CONFIG_SYS_MONITOR_LEN=524288 CONFIG_SPL_MMC=y -- 2.51.0
