v1 [1] was a board-local dtsi override that dropped the gated-fixed-clock refclks from pcie3x4 and pcie3x2 on rk3588-rock-5-itx.
Jonas pointed out that the u-boot dtsi is propagated to the OS via EFI handoff, making the dtsi-override approach brittle. This v2 adds a UCLASS_CLK driver for the "gated-fixed-clock" binding instead. Changes since v1: - drop the dtsi override - add a UCLASS_CLK driver for "gated-fixed-clock" (Jonas) - enable CONFIG_CLK_GATED_FIXED in the rock-5-itx defconfig Testing: Validated end-to-end on a NanoPC T6 LTS via the synthetic-DT approach Jonas suggested: a fake "gated-fixed-clock" node with a fake "regulator-fixed" supply injected into the board's u-boot dtsi and wired as an additional "ref" clock of pcie3x4. Probe and enable trigger when pcie_dw_rockchip runs clk_enable_bulk, and NVMe enumerates through the synthetic refclk path. I don't have free access to a rock-5-itx at the moment (the one I maintain serves a production mirror), so the v2 has been build-tested only on the real target. [1] https://lore.kernel.org/u-boot/20260518-rock-5-itx-pcie-refclk-dtsi-v1-1-faf862603...@superkali.me/ Signed-off-by: Daniele Briguglio <[email protected]> --- Daniele Briguglio (2): clk: add gated-fixed-clock driver configs: rock-5-itx-rk3588: enable CLK_GATED_FIXED configs/rock-5-itx-rk3588_defconfig | 1 + drivers/clk/Kconfig | 9 ++++ drivers/clk/Makefile | 1 + drivers/clk/clk-gated-fixed.c | 84 +++++++++++++++++++++++++++++++++++++ 4 files changed, 95 insertions(+) --- base-commit: 38dbe637c9dfcadbd1bc201bfbb27f96b2ad525a change-id: 20260518-rock-5-itx-pcie-refclk-dtsi-17ad4b21df1d Best regards, -- Daniele Briguglio <[email protected]>
