On Wed, Jun 03, 2026 at 03:53:04PM +0200, Marek Vasut wrote: > On 6/3/26 3:31 PM, Simona Toaca wrote: [...] > > > It seems that on iMX95 B0, the DDR_DUMMY offset is 0x76400 (aligned to 1 > > > kiB, which is too low): > > Yes, this is indeed too low. We align our DDR_DUMMY offset to 0x1000 (4KiB) > > in > > imx-mkimage, I see that here is not the case. At the same time, aligning > > it everytime (even for eMMC/SD case) to 64KiB seems overkill. > > Are you testing this patchset with upstream U-Boot mkimage ? > I tested it with U-Boot mkimage on SD/eMMC. For saving to SPI NOR, I was not aware of the 'fspi' option in the dtsi, so I used imx-mkimage, not expecting things to be different regarding DDR DUMMY in upstream U-Boot mkimage.
Thank you for catching this issue. Regards, Simona
