Introduce a defconfig for the Qualcomm IPQ5210 SoC based RDPs. Presently supports eMMC.
Signed-off-by: Varadarajan Narayanan <[email protected]> --- v3: Change CONFIG_SPL_STACK from 0x08c60000 to 0x08c24000 v2: Enable CONFIG_QCOM_GENI_MINICORE --- configs/qcom_ipq5210_mmc_defconfig | 106 +++++++++++++++++++++++++++++ 1 file changed, 106 insertions(+) create mode 100644 configs/qcom_ipq5210_mmc_defconfig diff --git a/configs/qcom_ipq5210_mmc_defconfig b/configs/qcom_ipq5210_mmc_defconfig new file mode 100644 index 00000000000..e903daa581c --- /dev/null +++ b/configs/qcom_ipq5210_mmc_defconfig @@ -0,0 +1,106 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_POSITION_INDEPENDENT=y +CONFIG_SYS_INIT_SP_BSS_OFFSET=0x180000 +CONFIG_ARCH_SNAPDRAGON=y +CONFIG_TEXT_BASE=0x87980000 +CONFIG_NR_DRAM_BANKS=2 +CONFIG_ENV_SIZE=0x40000 +CONFIG_ENV_OFFSET=0 +CONFIG_DEFAULT_DEVICE_TREE="qcom/ipq5210-rdp504" +CONFIG_SYS_LOAD_ADDR=0x90000000 +CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +# CONFIG_BOOTSTD is not set +CONFIG_OF_BOARD_SETUP=y +CONFIG_USE_PREBOOT=y +CONFIG_SYS_PBSIZE=1024 +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y +CONFIG_EFI_PARTITION=y +CONFIG_OF_LIVE=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_CLK=y +CONFIG_CLK_QCOM_IPQ5210=y +CONFIG_MSM_GPIO=y +# CONFIG_I2C is not set +# CONFIG_INPUT is not set +CONFIG_MISC=y +CONFIG_QCOM_GENI=y +CONFIG_QCOM_GENI_MINICORE=y +CONFIG_MMC_HS200_SUPPORT=y +CONFIG_MMC_SDHCI=y +# CONFIG_MMC_SDHCI_ADMA_HELPERS is not set +# CONFIG_MMC_SDHCI_ADMA is not set +# CONFIG_MMC_SDHCI_ADMA_FORCE_32BIT is not set +# CONFIG_MMC_SDHCI_ADMA_64BIT is not set +CONFIG_MMC_SDHCI_MSM=y +CONFIG_MTD=y +CONFIG_DM_MDIO=y +CONFIG_DM_ETH_PHY=y +CONFIG_DWC_ETH_QOS=y +CONFIG_DWC_ETH_QOS_QCOM=y +CONFIG_RGMII=y +CONFIG_PHY=y +CONFIG_PHY_QCOM_QMP_UFS=y +CONFIG_PHY_QCOM_QUSB2=y +CONFIG_PINCTRL=y +CONFIG_PINCONF=y +CONFIG_PINCTRL_QCOM_IPQ5210=y +CONFIG_DEBUG_UART_MSM_GENI=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_MSM_SERIAL=y +CONFIG_MSM_GENI_SERIAL=y +CONFIG_SOC_QCOM=y +CONFIG_SPL=y +CONFIG_SPL_FRAMEWORK=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_OF_LIBFDT=y +CONFIG_SPL_DM=y +CONFIG_SPL_GPIO=y +CONFIG_SPL_DM_GPIO=y +CONFIG_SPL_DM_RESET=y +CONFIG_SPL_PINCTRL=y +CONFIG_SPL_CLK=y +CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_SMEM=y +CONFIG_DM_STATS=y +CONFIG_SPL_SYS_MALLOC_F=y +CONFIG_SPL_SYS_MALLOC_F_LEN=0x20000 +CONFIG_SPL_SYS_MALLOC=y +CONFIG_SYS_MALLOC_DEFAULT_TO_INIT=y +CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y +CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x80008000 +CONFIG_SPL_SYS_MALLOC_SIZE=0x20000 +# CONFIG_SPL_SEPARATE_BSS is not set +# CONFIG_SPL_USE_TINY_PRINTF is not set +CONFIG_SPL_BSS_MAX_SIZE=0x4000 +CONFIG_SPL_TEXT_BASE=0x08c24000 +CONFIG_SPL_MAX_SIZE=0x3D000 +CONFIG_SPL_MMC=y +CONFIG_SPL_MMC_SDHCI_ADMA=y +CONFIG_SPL_MMC_WRITE=y +CONFIG_SPL_SYS_MMCSD_RAW_MODE=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x00 +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_SPL_STACKPROTECTOR=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_ATF=y +CONFIG_SPL_ATF_LOAD_IMAGE_V2=y +CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y +CONFIG_SPL_HAS_LOAD_FIT_ADDRESS=y +CONFIG_SPL_LOAD_FIT_ADDRESS=0x08cbe000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_HAVE_INIT_STACK=y +CONFIG_SPL_STACK=0x08c24000 +# CONFIG_SAVE_PREV_BL_FDT_ADDR is not set +CONFIG_SPL_WRAPPER_ELF=y -- 2.34.1
