Hi Marek, > > From: Alexander Koch <[email protected]> > > Add IDs for GigaDevice GD25LQ16 SPI NOR. > > Signed-off-by: Alexander Koch <[email protected]> > Signed-off-by: Marek Vasut <[email protected]> > --- > Cc: Alexander Koch <[email protected]> > Cc: David Lechner <[email protected]> > Cc: Flaviu Nistor <[email protected]> > Cc: Miquel Raynal <[email protected]> > Cc: Takahiro Kuwano <[email protected]> > Cc: Tom Rini <[email protected]> > Cc: Tudor Ambarus <[email protected]> > Cc: Vignesh R <[email protected]> > Cc: [email protected] > --- > drivers/mtd/spi/spi-nor-ids.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c > index c0fa98424aa..d3a24b51daf 100644 > --- a/drivers/mtd/spi/spi-nor-ids.c > +++ b/drivers/mtd/spi/spi-nor-ids.c > @@ -117,6 +117,11 @@ const struct flash_info spi_nor_ids[] = { > SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | > SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) > }, > + { > + INFO("gd25lq16", 0xc86015, 0, 64 * 1024, 32, > + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | > + SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
I could find a datasheet of GD25LQ16E that mentions the same ID (C8 60 15). https://www.mouser.com/datasheet/2/870/gd25lq16e_datasheet_v1_2_20210108-2399660.pdf?srsltid=AfmBOopEr50lYWZuINw4geNljXqWZxHqvrYc-_HyJi7ISbOc_9RRaiC1 This chip has 4 BP bits (BP3..BP0) + TB (BP4). The u-boot driver doesn't support 4-bit BP yet so locking feature shouldn't work as expected. > + }, > { > INFO("gd25q32", 0xc84016, 0, 64 * 1024, 64, > SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | > -- > 2.53.0
