Add the SDH0 controller node and its pinctrl groups to the u-boot overlay. The upstream DTS only contains the eMMC node; the SD card controller (sdhci@d4280000) and its MMC1 pinctrl configuration are missing. Place the new node inside the storage-bus via path-based merge so it inherits the dma-ranges from the parent bus.
Signed-off-by: Eric Chung <[email protected]> --- v3: - Fix SD pinctrl as uhs. v2: - Use vmmc-supply as vqmmc-supply on SD node. - Add alias of mmc0 and mmc1. --- arch/riscv/dts/k1-bananapi-f3-u-boot.dtsi | 87 ++++++++++++++++++++++++++++++- arch/riscv/dts/k1-musepi-pro-u-boot.dtsi | 82 ++++++++++++++++++++++++++++- 2 files changed, 165 insertions(+), 4 deletions(-) diff --git a/arch/riscv/dts/k1-bananapi-f3-u-boot.dtsi b/arch/riscv/dts/k1-bananapi-f3-u-boot.dtsi index 7f9443d6951..582bd61d27c 100644 --- a/arch/riscv/dts/k1-bananapi-f3-u-boot.dtsi +++ b/arch/riscv/dts/k1-bananapi-f3-u-boot.dtsi @@ -6,6 +6,11 @@ #include "binman.dtsi" / { + aliases { + mmc0 = &emmc; + mmc1 = &sdhci0; + }; + memory@0 { device_type = "memory"; reg = <0x00000000 0x00000000 0x00000000 0x80000000>; @@ -76,12 +81,14 @@ bootph-pre-ram; }; - buck3 { + buck3_1v8: buck3 { regulator-name = "vdd_1v8"; bootph-pre-ram; }; - aldo1 { + buck4_3v3: buck4 { }; + + aldo1: aldo1 { regulator-name = "vdd_1v8_mmc"; bootph-pre-ram; }; @@ -89,6 +96,82 @@ }; }; +/ { + soc { + storage-bus { + sdhci0: mmc@d4280000 { + bootph-pre-ram; + compatible = "spacemit,k1-sdhci"; + reg = <0x0 0xd4280000 0x0 0x200>; + clocks = <&syscon_apmu CLK_SDH_AXI>, + <&syscon_apmu CLK_SDH0>; + clock-names = "core", "io"; + interrupts = <99>; + resets = <&syscon_apmu RESET_SDH_AXI>, + <&syscon_apmu RESET_SDH0>; + reset-names = "sdh_axi", "sdh0"; + bus-width = <4>; + max-frequency = <204800000>; + cd-gpios = <&gpio K1_GPIO(80) GPIO_ACTIVE_LOW>; + pinctrl-names = "default", "uhs"; + pinctrl-0 = <&sdhci0_0_cfg>; + pinctrl-1 = <&sdhci0_1_cfg>; + status = "okay"; + }; + }; + }; +}; + +/* SD card pinctrl groups -- not present in upstream k1-pinctrl.dtsi */ +&pinctrl { + sdhci0_0_cfg: sdhci0-0-cfg { + grp_cmd_data { + pinmux = <K1_PADCONF(104, 0)>, /* MMC1_DAT3 */ + <K1_PADCONF(105, 0)>, /* MMC1_DAT2 */ + <K1_PADCONF(106, 0)>, /* MMC1_DAT1 */ + <K1_PADCONF(107, 0)>, /* MMC1_DAT0 */ + <K1_PADCONF(108, 0)>; /* MMC1_CMD */ + bias-pull-up = <1>; + drive-strength = <19>; + }; + grp_clk { + pinmux = <K1_PADCONF(109, 0)>; /* MMC1_CLK */ + bias-pull-down = <1>; + drive-strength = <19>; + }; + }; + + sdhci0_1_cfg: sdhci0-1-cfg { /* uhs */ + grp_cmd_data { + pinmux = <K1_PADCONF(104, 0)>, /* MMC1_DAT3 */ + <K1_PADCONF(105, 0)>, /* MMC1_DAT2 */ + <K1_PADCONF(106, 0)>, /* MMC1_DAT1 */ + <K1_PADCONF(107, 0)>, /* MMC1_DAT0 */ + <K1_PADCONF(108, 0)>; /* MMC1_CMD */ + bias-pull-up = <1>; + drive-strength = <42>; + }; + grp_clk { + pinmux = <K1_PADCONF(109, 0)>; /* MMC1_CLK */ + bias-pull-down = <1>; + drive-strength = <42>; + }; + }; +}; + +&emmc { + bootph-pre-ram; + resets = <&syscon_apmu RESET_SDH_AXI>, <&syscon_apmu RESET_SDH2>; + reset-names = "sdh_axi", "sdh2"; + vqmmc-supply = <&buck3_1v8>; + vmmc-supply = <&aldo1>; + max-frequency = <204800000>; +}; + +&sdhci0 { + vmmc-supply = <&buck4_3v3>; +}; + &binman { u-boot-spl-ddr { type = "section"; diff --git a/arch/riscv/dts/k1-musepi-pro-u-boot.dtsi b/arch/riscv/dts/k1-musepi-pro-u-boot.dtsi index 8a9a2a09de9..ac67db13d7b 100644 --- a/arch/riscv/dts/k1-musepi-pro-u-boot.dtsi +++ b/arch/riscv/dts/k1-musepi-pro-u-boot.dtsi @@ -10,6 +10,8 @@ aliases { console = &uart0; serial0 = &uart0; + mmc0 = &emmc; + mmc1 = &sdhci0; }; chosen { @@ -147,7 +149,7 @@ regulator-always-on; }; - buck4 { + buck4_3v3: buck4 { regulator-min-microvolt = <500000>; regulator-max-microvolt = <3300000>; regulator-ramp-delay = <5000>; @@ -168,7 +170,7 @@ regulator-always-on; }; - aldo1 { + aldo1: aldo1 { bootph-pre-ram; regulator-name = "vdd_1v8_mmc"; regulator-min-microvolt = <500000>; @@ -249,6 +251,82 @@ }; }; +/ { + soc { + storage-bus { + sdhci0: mmc@d4280000 { + bootph-pre-ram; + compatible = "spacemit,k1-sdhci"; + reg = <0x0 0xd4280000 0x0 0x200>; + clocks = <&syscon_apmu CLK_SDH_AXI>, + <&syscon_apmu CLK_SDH0>; + clock-names = "core", "io"; + interrupts = <99>; + resets = <&syscon_apmu RESET_SDH_AXI>, + <&syscon_apmu RESET_SDH0>; + reset-names = "sdh_axi", "sdh0"; + bus-width = <4>; + max-frequency = <204800000>; + cd-gpios = <&gpio K1_GPIO(80) GPIO_ACTIVE_LOW>; + pinctrl-names = "default", "uhs"; + pinctrl-0 = <&sdhci0_0_cfg>; + pinctrl-1 = <&sdhci0_1_cfg>; + status = "okay"; + }; + }; + }; +}; + +/* SD card pinctrl groups -- not present in upstream k1-pinctrl.dtsi */ +&pinctrl { + sdhci0_0_cfg: sdhci0-0-cfg { + grp_cmd_data { + pinmux = <K1_PADCONF(104, 0)>, /* MMC1_DAT3 */ + <K1_PADCONF(105, 0)>, /* MMC1_DAT2 */ + <K1_PADCONF(106, 0)>, /* MMC1_DAT1 */ + <K1_PADCONF(107, 0)>, /* MMC1_DAT0 */ + <K1_PADCONF(108, 0)>; /* MMC1_CMD */ + bias-pull-up = <1>; + drive-strength = <19>; + }; + grp_clk { + pinmux = <K1_PADCONF(109, 0)>; /* MMC1_CLK */ + bias-pull-down = <1>; + drive-strength = <19>; + }; + }; + + sdhci0_1_cfg: sdhci0-1-cfg { /* uhs */ + grp_cmd_data { + pinmux = <K1_PADCONF(104, 0)>, /* MMC1_DAT3 */ + <K1_PADCONF(105, 0)>, /* MMC1_DAT2 */ + <K1_PADCONF(106, 0)>, /* MMC1_DAT1 */ + <K1_PADCONF(107, 0)>, /* MMC1_DAT0 */ + <K1_PADCONF(108, 0)>; /* MMC1_CMD */ + bias-pull-up = <1>; + drive-strength = <42>; + }; + grp_clk { + pinmux = <K1_PADCONF(109, 0)>; /* MMC1_CLK */ + bias-pull-down = <1>; + drive-strength = <42>; + }; + }; +}; + +&emmc { + bootph-pre-ram; + resets = <&syscon_apmu RESET_SDH_AXI>, <&syscon_apmu RESET_SDH2>; + reset-names = "sdh_axi", "sdh2"; + vqmmc-supply = <&buck3_1v8>; + vmmc-supply = <&aldo1>; + max-frequency = <204800000>; +}; + +&sdhci0 { + vmmc-supply = <&buck4_3v3>; +}; + &binman { u-boot-spl-ddr { type = "section"; -- 2.51.0
