On 11/02/2012 09:30 AM, Lucas Stach wrote: > Am Freitag, den 02.11.2012, 08:45 -0600 schrieb Stephen Warren: >> On 11/01/2012 05:34 PM, Lucas Stach wrote: >>> Am Donnerstag, den 01.11.2012, 17:30 -0600 schrieb Stephen Warren: >>>> On 11/01/2012 05:17 PM, Lucas Stach wrote: >>>>> Hi Stephen, >>>>> >>>>> Am Donnerstag, den 01.11.2012, 16:14 -0600 schrieb Stephen Warren: >>>>>> From: Stephen Warren <[email protected]> >>>>>> >>>>>> TrimSlice's USB1 port has two purposes; it either acts as a device port >>>>>> hosting Tegra's USB recovery protocol, or acts as a host port connected >>>>>> to the internal USB->SATA bridge chip, which may in turn be connected to >>>>>> an SSD or HDD. Add the appropriate device tree and board configuration >>>>>> options to enable this port as a host port, and route the port to the >>>>>> SATA bridge using the VBUS GPIO. >>>>>> >>>>> Hm, I don't really like to abuse the VBUS GPIO for this function. As the >>>>> GPIO controlled routing is more a sort of pinmux can't you just add the >>>>> GPIO enable to pin_mux_usb()? >>>> >>>> I don't know, I think it's fine. It's certainly this way in the kernel. >>>> And for all I know, this GPIO does actually affect VBUS as well as >>>> flipping any mux (and the more I think about that, the more likely it >>>> is) although I can't actually know for sure since I don't have the >>>> schematics. >>> >>> If it's really triggering VBUS I'm fine with this, but then the comment >>> in pin_mux_usb() is a bit off. >> >> Sorry, I don't see anything inaccurate about it. What's wrong? > > In which way is it "masquerades as a VBUS GPIO"? If it triggers VBUS it > _is_ a VBUS GPIO. So the comment should rather state that switching on > VBUS also muxes the port to the internal bridge.
The GPIO definitely flips some form of bus mux. It's unclear whether it is a also VBUS GPIO for the internal device or not. My suspicion is that it must be, but without schematics I can't confirm. Either way, the comment seems quite accurate and descriptive, and this seems a perfectly reasonable solution. _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
