Add the initial board files to support the AM62L3-SK reference boards
for basic boot via SD and MMC
Signed-off-by: Bryan Brattlof <[email protected]>
---
board/ti/am62lx/Kconfig | 19 +++
board/ti/am62lx/MAINTAINERS | 8 +
board/ti/am62lx/Makefile | 7 +
board/ti/am62lx/am62lx.env | 8 +
board/ti/am62lx/board-cfg.yaml | 32 ++++
board/ti/am62lx/evm.c | 19 +++
board/ti/am62lx/sec-cfg.yaml | 380 +++++++++++++++++++++++++++++++++++++++++
7 files changed, 473 insertions(+)
diff --git a/board/ti/am62lx/Kconfig b/board/ti/am62lx/Kconfig
new file mode 100644
index 000000000000..2ee6d0221178
--- /dev/null
+++ b/board/ti/am62lx/Kconfig
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/
+#
+
+if TARGET_AM62L3_EVM
+
+config SYS_BOARD
+ default "am62lx"
+
+config SYS_VENDOR
+ default "ti"
+
+config SYS_CONFIG_NAME
+ default "am62l3_evm"
+
+source "board/ti/common/Kconfig"
+
+endif
diff --git a/board/ti/am62lx/MAINTAINERS b/board/ti/am62lx/MAINTAINERS
new file mode 100644
index 000000000000..e945689a7f17
--- /dev/null
+++ b/board/ti/am62lx/MAINTAINERS
@@ -0,0 +1,8 @@
+AM62Lx BOARD
+M: Vignesh Raghavendra <[email protected]>
+M: Bryan Brattlof <[email protected]>
+M: Tom Rini <[email protected]>
+S: Maintained
+F: board/ti/am62lx/
+F: include/configs/am62l3_evm.h
+F: configs/am62lx_evm_defconfig
diff --git a/board/ti/am62lx/Makefile b/board/ti/am62lx/Makefile
new file mode 100644
index 000000000000..ac5f5e7e807a
--- /dev/null
+++ b/board/ti/am62lx/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += evm.o
diff --git a/board/ti/am62lx/am62lx.env b/board/ti/am62lx/am62lx.env
new file mode 100644
index 000000000000..0dd86db400ee
--- /dev/null
+++ b/board/ti/am62lx/am62lx.env
@@ -0,0 +1,8 @@
+kernel_addr_r=0x82000000
+fdt_addr_r=0x88000000
+fdtoverlay_addr_r=0x89000000
+ramdisk_addr_r=0x88080000
+pxefile_addr_r=0x80100000
+
+dfu_alt_info_ram=
+ u-boot.img ram 0x83000000 0x400000
diff --git a/board/ti/am62lx/board-cfg.yaml b/board/ti/am62lx/board-cfg.yaml
new file mode 100644
index 000000000000..ae4b0e503bd1
--- /dev/null
+++ b/board/ti/am62lx/board-cfg.yaml
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Board configuration for the emulated AM62Lx
+#
+---
+board-cfg:
+ rev:
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
+
+ control:
+ subhdr:
+ magic: 0xC1D3
+ size: 7
+ main_isolation_enable: 0x5A
+ main_isolation_hostid: 0x2
+
+ bm_writer_cfg:
+ subhdr:
+ magic: 0x7D8A
+ size: 5
+ allowed_host: 10
+
+ reserved: [0, 0, 0, 0, 0, 0, 0]
+
+ debug_cfg:
+ subhdr:
+ magic: 0x020C
+ size: 8
+ trace_dst_enables: 0x00
+ trace_src_enables: 0x00
diff --git a/board/ti/am62lx/evm.c b/board/ti/am62lx/evm.c
new file mode 100644
index 000000000000..cafafb8ede87
--- /dev/null
+++ b/board/ti/am62lx/evm.c
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Board specific initialization for AM62Lx platforms
+ *
+ * Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/
+ *
+ */
+
+#include <asm/arch/hardware.h>
+#include <asm/io.h>
+#include <dm/uclass.h>
+#include <env.h>
+#include <fdt_support.h>
+#include <spl.h>
+
+int board_init(void)
+{
+ return 0;
+}
diff --git a/board/ti/am62lx/sec-cfg.yaml b/board/ti/am62lx/sec-cfg.yaml
new file mode 100644
index 000000000000..044e8cb09dd7
--- /dev/null
+++ b/board/ti/am62lx/sec-cfg.yaml
@@ -0,0 +1,380 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Security management configuration for AM62Lx
+#
+---
+
+sec-cfg:
+ rev:
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
+
+ processor_acl_list:
+ subhdr:
+ magic: 0xF1EA
+ size: 164
+
+ proc_acl_entries:
+ - # 1
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 2
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 3
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 4
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 5
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 6
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 7
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 8
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 9
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 10
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 11
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 12
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 13
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 14
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 15
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 16
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 17
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 18
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 19
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 20
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 21
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 22
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 23
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 24
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 25
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 26
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 27
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 28
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 29
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 30
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 31
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 32
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ host_hierarchy:
+ subhdr:
+ magic: 0x8D27
+ size: 68
+ host_hierarchy_entries:
+ - # 1
+ host_id: 0
+ supervisor_host_id: 0
+ - # 2
+ host_id: 0
+ supervisor_host_id: 0
+ - # 3
+ host_id: 0
+ supervisor_host_id: 0
+ - # 4
+ host_id: 0
+ supervisor_host_id: 0
+ - # 5
+ host_id: 0
+ supervisor_host_id: 0
+ - # 6
+ host_id: 0
+ supervisor_host_id: 0
+ - # 7
+ host_id: 0
+ supervisor_host_id: 0
+ - # 8
+ host_id: 0
+ supervisor_host_id: 0
+ - # 9
+ host_id: 0
+ supervisor_host_id: 0
+ - # 10
+ host_id: 0
+ supervisor_host_id: 0
+ - # 11
+ host_id: 0
+ supervisor_host_id: 0
+ - # 12
+ host_id: 0
+ supervisor_host_id: 0
+ - # 13
+ host_id: 0
+ supervisor_host_id: 0
+ - # 14
+ host_id: 0
+ supervisor_host_id: 0
+ - # 15
+ host_id: 0
+ supervisor_host_id: 0
+ - # 16
+ host_id: 0
+ supervisor_host_id: 0
+ - # 17
+ host_id: 0
+ supervisor_host_id: 0
+ - # 18
+ host_id: 0
+ supervisor_host_id: 0
+ - # 19
+ host_id: 0
+ supervisor_host_id: 0
+ - # 20
+ host_id: 0
+ supervisor_host_id: 0
+ - # 21
+ host_id: 0
+ supervisor_host_id: 0
+ - # 22
+ host_id: 0
+ supervisor_host_id: 0
+ - # 23
+ host_id: 0
+ supervisor_host_id: 0
+ - # 24
+ host_id: 0
+ supervisor_host_id: 0
+ - # 25
+ host_id: 0
+ supervisor_host_id: 0
+ - # 26
+ host_id: 0
+ supervisor_host_id: 0
+ - # 27
+ host_id: 0
+ supervisor_host_id: 0
+ - # 28
+ host_id: 0
+ supervisor_host_id: 0
+ - # 29
+ host_id: 0
+ supervisor_host_id: 0
+ - # 30
+ host_id: 0
+ supervisor_host_id: 0
+ - # 31
+ host_id: 0
+ supervisor_host_id: 0
+ - # 32
+ host_id: 0
+ supervisor_host_id: 0
+ otp_config:
+ subhdr:
+ magic: 0x4081
+ size: 69
+ otp_entry:
+ - # 1
+ host_id: 10
+ host_perms: 2
+ - # 2
+ host_id: 10
+ host_perms: 2
+ - # 3
+ host_id: 10
+ host_perms: 2
+ - # 4
+ host_id: 10
+ host_perms: 2
+ - # 5
+ host_id: 10
+ host_perms: 2
+ - # 6
+ host_id: 10
+ host_perms: 2
+ - # 7
+ host_id: 10
+ host_perms: 2
+ - # 8
+ host_id: 10
+ host_perms: 2
+ - # 9
+ host_id: 10
+ host_perms: 2
+ - # 10
+ host_id: 10
+ host_perms: 2
+ - # 11
+ host_id: 10
+ host_perms: 2
+ - # 12
+ host_id: 10
+ host_perms: 2
+ - # 13
+ host_id: 10
+ host_perms: 2
+ - # 14
+ host_id: 10
+ host_perms: 2
+ - # 15
+ host_id: 10
+ host_perms: 2
+ - # 16
+ host_id: 10
+ host_perms: 2
+ - # 17
+ host_id: 10
+ host_perms: 2
+ - # 18
+ host_id: 10
+ host_perms: 2
+ - # 19
+ host_id: 10
+ host_perms: 2
+ - # 20
+ host_id: 10
+ host_perms: 2
+ - # 21
+ host_id: 10
+ host_perms: 2
+ - # 22
+ host_id: 10
+ host_perms: 2
+ - # 23
+ host_id: 10
+ host_perms: 2
+ - # 24
+ host_id: 10
+ host_perms: 2
+ - # 25
+ host_id: 10
+ host_perms: 2
+ - # 26
+ host_id: 10
+ host_perms: 2
+ - # 27
+ host_id: 10
+ host_perms: 2
+ - # 28
+ host_id: 10
+ host_perms: 2
+ - # 29
+ host_id: 10
+ host_perms: 2
+ - # 30
+ host_id: 10
+ host_perms: 2
+ - # 31
+ host_id: 10
+ host_perms: 2
+ - # 32
+ host_id: 10
+ host_perms: 2
+ write_host_id: 10
+ dkek_config:
+ subhdr:
+ magic: 0x5170
+ size: 12
+ allowed_hosts: [128, 0, 0, 0]
+ allow_dkek_export_tisci: 0x5A
+ rsvd: [0, 0, 0]
+ sa2ul_cfg:
+ subhdr:
+ magic: 0x0
+ size: 0
+ auth_resource_owner: 0
+ enable_saul_psil_global_config_writes: 0x0
+ rsvd: [0, 0]
+ sec_dbg_config:
+ subhdr:
+ magic: 0x42AF
+ size: 16
+ allow_jtag_unlock: 0x5A
+ allow_wildcard_unlock: 0x5A
+ allowed_debug_level_rsvd: 0
+ rsvd: 0
+ min_cert_rev: 0x0
+ jtag_unlock_hosts: [0, 0, 0, 0]
+ sec_handover_cfg:
+ subhdr:
+ magic: 0x0
+ size: 10
+ handover_msg_sender: 0
+ handover_to_host_id: 0
+ rsvd: [0, 0, 0, 0]