Add support for MT6358 compatible PMICs to the MediaTek PMIC wrapper driver. This has a different register map compared to other already supported PMICs. It will be used initially for Genio 360 EVK support.
Signed-off-by: David Lechner <[email protected]> --- drivers/power/pmic/mtk-pwrap.c | 42 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/drivers/power/pmic/mtk-pwrap.c b/drivers/power/pmic/mtk-pwrap.c index 3320e3cfdc0..e899990465d 100644 --- a/drivers/power/pmic/mtk-pwrap.c +++ b/drivers/power/pmic/mtk-pwrap.c @@ -13,6 +13,7 @@ #include <linux/bitfield.h> #include <linux/err.h> #include <power/pmic.h> +#include <power/mt6358.h> #include <power/mt6357.h> #include <power/mt6359.h> #include <time.h> @@ -29,6 +30,11 @@ static const struct pmic_child_info mt6359_pmic_children_info[] = { { } }; +static const struct pmic_child_info mt6358_pmic_children_info[] = { + { .prefix = "v", .driver = MT6358_REGULATOR_DRIVER }, + { } +}; + /* macro for wrapper status */ #define PWRAP_GET_WACS_RDATA GENMASK(15, 0) #define PWRAP_GET_WACS_FSM GENMASK(18, 16) @@ -175,6 +181,34 @@ static const u32 mt6359_regs[] = { [PWRAP_SPISLV_KEY] = 0x044a, }; +static const u32 mt6358_regs[] = { + [PWRAP_SMT_CON1] = 0x0030, + [PWRAP_DRV_CON1] = 0x0038, + [PWRAP_FILTER_CON0] = 0x0040, + [PWRAP_GPIO_PULLEN0_CLR] = 0x0098, + [PWRAP_RG_SPI_CON0] = 0x0408, + [PWRAP_RG_SPI_RECORD0] = 0x040a, + [PWRAP_DEW_DIO_EN] = 0x040c, + [PWRAP_DEW_READ_TEST] = 0x040e, + [PWRAP_DEW_WRITE_TEST] = 0x0410, + [PWRAP_DEW_CRC_EN] = 0x0414, + [PWRAP_DEW_CIPHER_KEY_SEL] = 0x041a, + [PWRAP_DEW_CIPHER_IV_SEL] = 0x041c, + [PWRAP_DEW_CIPHER_EN] = 0x041e, + [PWRAP_DEW_CIPHER_RDY] = 0x0420, + [PWRAP_DEW_CIPHER_MODE] = 0x0422, + [PWRAP_DEW_CIPHER_SWRST] = 0x0424, + [PWRAP_RG_SPI_CON2] = 0x0432, + [PWRAP_RG_SPI_CON3] = 0x0434, + [PWRAP_RG_SPI_CON4] = 0x0436, + [PWRAP_RG_SPI_CON5] = 0x0438, + [PWRAP_RG_SPI_CON6] = 0x043a, + [PWRAP_RG_SPI_CON7] = 0x043c, + [PWRAP_RG_SPI_CON8] = 0x043e, + [PWRAP_RG_SPI_CON13] = 0x0448, + [PWRAP_SPISLV_KEY] = 0x044a, +}; + enum pwrap_regs { PWRAP_MUX_SEL, PWRAP_WRAP_EN, @@ -629,9 +663,15 @@ static const struct pwrap_slv_type pmic_mt6359 = { .caps = 0, }; +static const struct pwrap_slv_type pmic_mt6366 = { + .dew_regs = mt6358_regs, + .caps = 0, +}; + static const struct udevice_id mtk_pmic_ids[] = { { .compatible = "mediatek,mt6357", .data = (ulong)&pmic_mt6357 }, { .compatible = "mediatek,mt6359", .data = (ulong)&pmic_mt6359 }, + { .compatible = "mediatek,mt6366", .data = (ulong)&pmic_mt6366 }, { } }; @@ -770,6 +810,8 @@ static int mtk_pwrap_bind(struct udevice *dev) if (ofnode_device_is_compatible(pmic_node, "mediatek,mt6357")) { pmic_children_info = mt6357_pmic_children_info; + } else if (ofnode_device_is_compatible(pmic_node, "mediatek,mt6358")) { + pmic_children_info = mt6358_pmic_children_info; } else if (ofnode_device_is_compatible(pmic_node, "mediatek,mt6359")) { pmic_children_info = mt6359_pmic_children_info; } else { -- 2.43.0
