Re: [PATCH v5 09/21] board: evm: Enable de-isolation of IOs at resume for j7200 and j784s4

[Kumar, Udit]

On 8/28/2026 7:27 PM, Richard Genoud (TI) wrote:
> From: Abhash Kumar Jha <a-kum...@ti.com>
> 
> When resuming from IO_ONLY_PLUS_DDR low power mode, the IOs are
> isolated. Remove that isolation in resume sequence.
> 

What is IO_ONLY_PLUS_DDR ? Please give bit more context about this mode

> On j7200, The canuart IOs are isolated whereas on j784s4, the
> mcu_general IOs are isolated.
> 
> Signed-off-by: Abhash Kumar Jha <a-kum...@ti.com>
> Co-developed-by: Richard Genoud (TI) <richard.gen...@bootlin.com>
> Signed-off-by: Richard Genoud (TI) <richard.gen...@bootlin.com>
> ---
>  .../arm/mach-k3/include/mach/j721e_hardware.h | 11 ++++++++
>  .../mach-k3/include/mach/j784s4_hardware.h    | 10 ++++++++
>  arch/arm/mach-k3/r5/lpm-common.c              | 15 +++++++++++
>  board/ti/j721e/evm.c                          | 25 +++++++++++++++++++
>  board/ti/j784s4/evm.c                         | 24 ++++++++++++++++++
>  5 files changed, 85 insertions(+)
> 
> diff --git a/arch/arm/mach-k3/include/mach/j721e_hardware.h 
> b/arch/arm/mach-k3/include/mach/j721e_hardware.h
> index 5bef309af0a4..e6e437af4ec0 100644
> --- a/arch/arm/mach-k3/include/mach/j721e_hardware.h
> +++ b/arch/arm/mach-k3/include/mach/j721e_hardware.h
> @@ -14,6 +14,17 @@
>  #define WKUP_CTRL_MMR0_BASE                          0x43000000
>  #define MCU_CTRL_MMR0_BASE                           0x40f00000
>  #define CTRL_MMR0_BASE                                       0x00100000
> +#define DMSC_PWRCTRL_BASE                            0x44130000
> +
> +#define PMCTRL_IO_1                                  (DMSC_PWRCTRL_BASE + 
> 0x88)
> +#define PMCTRL_IO_LPM                                        PMCTRL_IO_1

Alignment,look one extra tab
> +#define CANUART_WAKE_CTRL                            0x18300
> +#define CANUART_WAKE_STAT0                           0x18308
> +#define CANUART_WAKE_STAT1                           0x1830C
> +
> +#define IO_ISO_MAGIC_VAL                             0x55555554
> +#define CANUART_WAKE_STAT1_CANUART_IO_MODE           BIT(0)
> [..]
>  
> +__weak void clear_isolation(void) { }
> +
>  /* This is used by J722s */
>  __weak void ctrl_mmr_unlock(void) { }

ctrl_mmr_unlock() is available at all stage, why we need weak here

>  
> @@ -72,11 +76,22 @@ void k3_deassert_ddr_ret(const char *pmic_name, unsigned 
> int ddr_ret_val,
>  bool j7xx_board_is_resuming(void)
>  {
>       struct udevice *pmic, *i2c;
> [..]> +       if (ret < 0)
> +             pr_err("Deisolation timeout");

this is panic state, if de-isolation failed ?

> +}
> +
> +#endif /* CONFIG_SPL_BUILD && CONFIG_TARGET_J7200_R5_EVM */
> +
> [..]> +       if (ret < 0)
> +             pr_err("Deisolation timeout");

same here

> +}
> +#endif /* CONFIG_SPL_BUILD && CONFIG_TARGET_J784s4_R5_EVM */
> +
>  void spl_board_init(void)
>  {
>       struct udevice *dev;