Change cadence_qspi_apb_enable_linear_mode() to return int and propagate the mux-select failure instead of only logging it, since continuing in the wrong AHB read/DMA mode should not be a silent fallback. This also updates the weak default and its two generic call sites in cadence_qspi_apb.c - every reference to this function is confined to cadence_qspi.h, cadence_qspi_apb.c, and cadence_ospi_versal.c, so the signature change stays within the Cadence QSPI driver and touches no other vendor's code.
Signed-off-by: Akshay Belsare <[email protected]> --- drivers/spi/cadence_ospi_versal.c | 9 +++++++-- drivers/spi/cadence_qspi.h | 2 +- drivers/spi/cadence_qspi_apb.c | 15 +++++++++++---- 3 files changed, 19 insertions(+), 7 deletions(-) diff --git a/drivers/spi/cadence_ospi_versal.c b/drivers/spi/cadence_ospi_versal.c index 602a7f4884c..6c388ab8208 100644 --- a/drivers/spi/cadence_ospi_versal.c +++ b/drivers/spi/cadence_ospi_versal.c @@ -39,7 +39,10 @@ int cadence_qspi_apb_dma_read(struct cadence_spi_priv *priv, clrbits_le32(priv->regbase + CQSPI_REG_CONFIG, CQSPI_REG_CONFIG_DIRECT); - cadence_qspi_apb_enable_linear_mode(false); + ret = cadence_qspi_apb_enable_linear_mode(false); + if (ret) + return ret; + reg = readl(priv->regbase + CQSPI_REG_CONFIG); reg |= CQSPI_REG_CONFIG_ENBL_DMA; writel(reg, priv->regbase + CQSPI_REG_CONFIG); @@ -198,7 +201,7 @@ int cadence_qspi_flash_reset(struct udevice *dev) } #endif -void cadence_qspi_apb_enable_linear_mode(bool enable) +int cadence_qspi_apb_enable_linear_mode(bool enable) { int ret; @@ -206,6 +209,8 @@ void cadence_qspi_apb_enable_linear_mode(bool enable) ret = zynqmp_pm_ospi_enable_linear_mode(enable); if (ret) printf("%s: failed to select OSPI mux mode: %d\n", __func__, ret); + + return ret; } int cadence_device_reset(struct udevice *bus) diff --git a/drivers/spi/cadence_qspi.h b/drivers/spi/cadence_qspi.h index f8716aa8c7d..6a8f9c58e4e 100644 --- a/drivers/spi/cadence_qspi.h +++ b/drivers/spi/cadence_qspi.h @@ -316,7 +316,7 @@ int cadence_qspi_apb_wait_for_dma_cmplt(struct cadence_spi_priv *priv); int cadence_qspi_apb_exec_flash_cmd(void *reg_base, unsigned int reg); int cadence_qspi_flash_reset(struct udevice *dev); ofnode cadence_qspi_get_subnode(struct udevice *dev); -void cadence_qspi_apb_enable_linear_mode(bool enable); +int cadence_qspi_apb_enable_linear_mode(bool enable); int zynqmp_pm_ospi_init(void); int cadence_device_reset(struct udevice *dev); int cadence_qspi_setup_opcode_ext(struct cadence_spi_priv *priv, diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c index 0d4bc685f5d..dbfb7c1f592 100644 --- a/drivers/spi/cadence_qspi_apb.c +++ b/drivers/spi/cadence_qspi_apb.c @@ -37,9 +37,9 @@ #include <malloc.h> #include "cadence_qspi.h" -__weak void cadence_qspi_apb_enable_linear_mode(bool enable) +__weak int cadence_qspi_apb_enable_linear_mode(bool enable) { - return; + return 0; } void cadence_qspi_apb_controller_enable(void *reg_base) @@ -770,8 +770,11 @@ int cadence_qspi_apb_read_execute(struct cadence_spi_priv *priv, u64 from = op->addr.val; void *buf = op->data.buf.in; size_t len = op->data.nbytes; + int ret; - cadence_qspi_apb_enable_linear_mode(true); + ret = cadence_qspi_apb_enable_linear_mode(true); + if (ret) + return ret; if (priv->use_dac_mode && (from + len < priv->ahbsize)) { if (len < 256 || @@ -944,6 +947,7 @@ int cadence_qspi_apb_write_execute(struct cadence_spi_priv *priv, u32 to = op->addr.val; const void *buf = op->data.buf.out; size_t len = op->data.nbytes; + int ret; /* * Some flashes like the Cypress Semper flash expect a dummy 4-byte @@ -953,7 +957,10 @@ int cadence_qspi_apb_write_execute(struct cadence_spi_priv *priv, * mode. So, we can not use direct mode when in DTR mode for writing * data. */ - cadence_qspi_apb_enable_linear_mode(true); + ret = cadence_qspi_apb_enable_linear_mode(true); + if (ret) + return ret; + if (!priv->dtr && priv->use_dac_mode && (to + len < priv->ahbsize)) { memcpy_toio(priv->ahbbase + to, buf, len); if (!cadence_qspi_wait_idle(priv->regbase)) -- 2.25.1
