Hi Alice,
On Mon, Sep 21, 2026 at 11:57 PM <[email protected]> wrote:
> +static void board_gpio_init(void)
> +{
> + struct gpio_desc desc;
> + int ret;
> +
> + /* Enable EXT1_PWREN for PCIE_3.3V */
> + ret = dm_gpio_lookup_name("gpio@22_13", &desc);
> + if (ret)
> + return;
> +
> + ret = dm_gpio_request(&desc, "EXT1_PWREN");
> + if (ret)
> + return;
> +
> + dm_gpio_set_dir_flags(&desc, GPIOD_IS_OUT);
> + dm_gpio_set_value(&desc, 1);
> +
> + /* Deassert SD3_nRST */
> + ret = dm_gpio_lookup_name("gpio@22_12", &desc);
> + if (ret)
> + return;
> +
> + ret = dm_gpio_request(&desc, "SD3_nRST");
> + if (ret)
> + return;
> +
> + dm_gpio_set_dir_flags(&desc, GPIOD_IS_OUT);
> + dm_gpio_set_value(&desc, 1);
> +}
Can't all these GPIO settings in C code be avoided here? You could
describe the GPIO hog in DTS instead.
> + if (is_voltage_mode(VOLT_LOW_DRIVE)) {
> + buck_val = 0x10; /* 0.8v for Low drive mode */
Please define 0x10 so you don't need to explain it in a comment.
Also, the unit for Volt is V, not v. Please check globally.
> + printf("PMIC: Low Drive Voltage Mode\n");
> + } else if (is_voltage_mode(VOLT_NOMINAL_DRIVE)) {
> + buck_val = 0x14; /* 0.85v for Nominal drive mode */
Ditto.
> + printf("PMIC: Nominal Voltage Mode\n");
> + } else {
> + buck_val = 0x18; /* 0.9v for Over drive mode */
Ditto.
> + printf("PMIC: Over Drive Voltage Mode\n");
> + }
> +
> + pmic_reg_write(dev, PF9453_BUCK2OUT, buck_val);
> +
> + /* set standby voltage to 0.65v */
> + pmic_reg_write(dev, PF9453_BUCK2OUT_STBY, 0x4);
> +
> + /* 1.1v for LPDDR4 */
> + pmic_reg_write(dev, PF9453_BUCK1OUT, 0x14);
> +
> + ret = pmic_reg_read(dev, PF9453_CONFIG1);
> + if (ret < 0)
> + return ret;
> + /*The timer default is 8sec and too long, so change to 100ms.*/
Add a space after /* and before */. No need to end with a period.
> +imx91_9x9_qsb
> +=============
> +
> +U-Boot for the NXP i.MX91 Quick Start Board
> +
> +Quick Start
> +-----------
> +
> +- Get and Build the ARM Trusted firmware
s/firmware/Firmware
> +- Get the DDR firmware
> +- Get ahab-container.img
> +- Build U-Boot
> +- Boot
> +
> +Get and Build the ARM Trusted firmware
Get and build the ARM Trusted Firmware
> +Burn the flash.bin to MicroSD card offset 32KB:
at offset
> +
> +.. code-block:: bash
> +
> + $ dd if=flash.bin of=/dev/sd[x] bs=1024 seek=32 conv=notrunc
> +
> +Boot
> +----
> +
> +Set the Boot switch to SD boot.
> diff --git a/doc/board/nxp/index.rst b/doc/board/nxp/index.rst
> index b11730e1eac..076f6b48001 100644
> --- a/doc/board/nxp/index.rst
> +++ b/doc/board/nxp/index.rst
> @@ -12,6 +12,7 @@ NXP Semiconductors
> imx8mq_evk
> imx8qxp_mek
> imx8ulp_evk
> + imx91_9x9_qsb
> imx91_11x11_evk
> imx91_11x11_frdm
> imx93_9x9_qsb
> diff --git a/include/configs/imx91_qsb.h b/include/configs/imx91_qsb.h
> new file mode 100644
> index 00000000000..2175e2d4212
> --- /dev/null
> +++ b/include/configs/imx91_qsb.h
> @@ -0,0 +1,28 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright 2024 NXP
> + */
> +
> +#ifndef __IMX91_QSB_H
> +#define __IMX91_QSB_H
> +
> +#include <linux/sizes.h>
> +#include <linux/stringify.h>
Is this needed?
> +#include <asm/arch/imx-regs.h>
> +
> +#define CFG_SYS_UBOOT_BASE \
> + (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
> +
> +/* Link Definitions */
> +
> +#define CFG_SYS_INIT_RAM_ADDR 0x80000000
> +#define CFG_SYS_INIT_RAM_SIZE 0x200000
> +
> +#define CFG_SYS_SDRAM_BASE 0x80000000
> +#define PHYS_SDRAM 0x80000000
> +#define PHYS_SDRAM_SIZE 0x40000000 /* 1GB DDR */
> +
> +/* Using WDOG for reset */
> +#define WDOG_BASE_ADDR WDG3_BASE_ADDR
You sent an earlier patch that removed the WDOG_BASE_ADDR definition.
Please do not reintroduce it.
> +
> +#endif
> diff --git a/include/power/pf9453.h b/include/power/pf9453.h
> index f33b839cde0..60c2a9f5e64 100644
> --- a/include/power/pf9453.h
> +++ b/include/power/pf9453.h
> @@ -64,6 +64,8 @@ enum {
> #define PF9453_LDO2_MASK 0x3f
> #define PF9453_LDOSNVS_MASK 0x7f
>
> +#define PF9453_RESETKEY_TIMER_MASK 0x1c
This should be a separate patch, as it is unrelated to i.MX91 QSB.
