I brought up the two GMACs on a Rockchip RK3568 board that uses Maxio MAE0621A PHYs and ran into a deadlock in eqos_start(): the driver waits for DMA_MODE.SWR to self-clear, but with these PHYs the bit never does. The patches below fix that and add the missing PHY driver.
Some background, since this PHY is not exactly mainstream. SWR only completes once every clock domain of the MAC is running, and in RGMII the RX clock is not generated by the MAC at all -- the PHY drives RXC back to the MAC. Out of reset the MAE0621A still answers MDIO reads, but it does not start its RGMII interface: no link, no RXC. The vendor's out-of-tree Linux driver carries a mandatory init sequence (a clock-mode register selecting crystal operation, plus about twenty analog tuning writes); only after that does the interface come up. So the old code sat waiting for a clock that nothing would ever start, because the code starting it ran after the wait. Bumping the timeout just makes it fail slower. Patch 1 moves the SWR to after the PHY is connected, configured and up; us_tic_counter follows it, since it must be written after a completed reset. This is the same order Linux stmmac_open() uses (stmmac_init_phy() before stmmac_hw_setup()). One caveat: I have no i.MX8M Plus hardware, so I could not test the GPR[1] latching there myself. As far as I can tell the GPR is written at probe time and phy_connect()/phy_config() never touch the interface mode, so the reorder should be safe -- please review that part with extra care. Patch 2 ports the vendor init sequence into a U-Boot PHY driver. Two quirks of this PHY worth knowing about: it reports link before its autoneg-complete bit settles (the vendor driver works around the same thing), and on my board PHY ID1 reads 0xffff where the vendor kernel sees 0x7b74, so the driver matches on the low 16 ID bits. Tested on the RK3568 board: ping works on both GMACs with both patches applied. Reverting patch 1 brings "EQOS_DMA_MODE_SWR stuck" right back; with patch 2 reverted the PHY has no driver and autoneg never completes. Board support for my board is not part of this series. Base: v2026.10-rc4 (211de43d0f9). checkpatch flags "does MAINTAINERS need updating?" on patch 2, but drivers/net/ is already covered by the NETWORK entry. kongchen (2): net: dwc_eth_qos: bring PHY up before triggering DMA soft reset net: phy: add support for Maxio MAE0621A Ethernet PHYs drivers/net/dwc_eth_qos.c | 51 +++++---- drivers/net/phy/Kconfig | 8 ++ drivers/net/phy/Makefile | 1 + drivers/net/phy/maxio.c | 228 ++++++++++++++++++++++++++++++++++++++ 4 files changed, 267 insertions(+), 21 deletions(-) create mode 100644 drivers/net/phy/maxio.c -- 2.55.0
