On 9/17/26 7:52 AM, Julien Stephan wrote: > The topckgen and gate clock U_BOOT_DRIVER entries only differ by > their of_match table: they share the same probe, ops, private data > and flags. Merge them into a single mt8189-clk driver, the way > clk-mt8366.c already does, so that a new clock block only needs a > new of_match entry. > > The MTK_GATE_CLK_TREE() declarations are moved above the of_match > tables, as the merged table now references them. The gate entries, > which used to be written on a single line, are also split over two > lines, for consistency with the topckgen entry and to keep the lines > short. > > No functional change. > > Signed-off-by: Julien Stephan <[email protected]> > --- > drivers/clk/mediatek/clk-mt8189.c | 73 > +++++++++++++++++++++------------------ > 1 file changed, 40 insertions(+), 33 deletions(-) > > diff --git a/drivers/clk/mediatek/clk-mt8189.c > b/drivers/clk/mediatek/clk-mt8189.c > index 8df09f4a129..a5cb387772a 100644 > --- a/drivers/clk/mediatek/clk-mt8189.c > +++ b/drivers/clk/mediatek/clk-mt8189.c > @@ -1970,6 +1970,14 @@ static const struct mtk_clk_tree > mt8189_vlpckgen_clk_tree = { > .type = MTK_CLK_TREE_VLP_CK, > }; > > +MTK_GATE_CLK_TREE(perao_clks_tree, perao_clks, ext_clock_rates); > +MTK_GATE_CLK_TREE(imp_clks_tree, imp_clks, ext_clock_rates); > +MTK_GATE_CLK_TREE(mm_clks_tree, mm_clks, ext_clock_rates); > +MTK_GATE_CLK_TREE(mminfra_config_clks_tree, mminfra_config_clks, > ext_clock_rates); > +MTK_GATE_CLK_TREE(ufs_config_ao_clks_tree, ufs_config_ao_clks, > ext_clock_rates); > +MTK_GATE_CLK_TREE(ufs_config_pdn_clks_tree, ufs_config_pdn_clks, > ext_clock_rates); > +MTK_GATE_CLK_TREE(vlpcfg_ao_clks_tree, vlpcfg_ao_clks, ext_clock_rates);
Can we make this move when we do the MTK_GATE_CLK_TREE change so that we don't have to touch the same line twice?
