From: Abhash Kumar Jha <[email protected]> While resuming from suspend, the wakeup reason need to be stored and this will be used by the Linux kernel once its up.
Use the 32 bytes of MCU_PSRAM0_RAM area (addr = 0x40280000) to store the wakeup reason. Read the value as soon as it starts and store it internally. Signed-off-by: Abhash Kumar Jha <[email protected]> Co-developed-by: Richard Genoud (TI) <[email protected]> Signed-off-by: Richard Genoud (TI) <[email protected]> --- arch/arm/mach-k3/Kconfig | 10 ++++++++++ arch/arm/mach-k3/r5/lpm-common.c | 25 +++++++++++++++++++++++++ 2 files changed, 35 insertions(+) diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig index a32ed3a9683f..bbb62fa617fc 100644 --- a/arch/arm/mach-k3/Kconfig +++ b/arch/arm/mach-k3/Kconfig @@ -101,6 +101,16 @@ config SYS_K3_BOOT_CORE_ID int default 16 +config SYS_K3_SCRATCH_LPM_ADDR + hex + default 0x40280000 if SOC_K3_J721E || SOC_K3_J7200 || SOC_K3_J784S4 + default 0x0 + help + Address where the wake-up reason is stored at resume (32 bits). + It will be read by the Linux kernel once its up. + On J7200/J784s4 the MCU_PSRAM0_RAM is used by default. + Set it to 0 if unused. + config K3_EARLY_CONS bool "Activate to allow for an early console during SPL" depends on SPL diff --git a/arch/arm/mach-k3/r5/lpm-common.c b/arch/arm/mach-k3/r5/lpm-common.c index 96306f307973..6595f0caebcf 100644 --- a/arch/arm/mach-k3/r5/lpm-common.c +++ b/arch/arm/mach-k3/r5/lpm-common.c @@ -27,6 +27,11 @@ /* PMIC register where the magic value resides */ #define K3_LPM_SCRATCH_PAD_REG_3 0xcb +/* Wake-up source IDs */ +#define K3_LPM_WAKE_SOURCE_MAIN_IO 0x80 +#define K3_LPM_WAKE_SOURCE_MCU_IO 0x81 +#define K3_LPM_WAKE_SOURCE_PMIC_GPIO 0xB0 + #define IO_ISO_STATUS BIT(25) #define CONTEXT_SAVE_SZ 0x80000 @@ -49,6 +54,11 @@ enum k3_resume_state { K3_RESUME_STATE_RESUMING }; +struct lpm_scratch_space { + u16 wake_src; + u16 reserved; +} __packed; + __weak void clear_isolation(void) { } #define GPIO_OUT_1 0x3D @@ -81,6 +91,7 @@ void k3_deassert_ddr_ret(const char *pmic_name, unsigned int ddr_ret_val, bool j7xx_board_is_resuming(void) { static enum k3_resume_state k3_resuming; + struct lpm_scratch_space *lpm_scratch; struct udevice *pmic; u32 pmctrl_val = 0; int ret, magic; @@ -91,7 +102,18 @@ bool j7xx_board_is_resuming(void) #ifdef PMCTRL_IO_LPM pmctrl_val = readl(PMCTRL_IO_LPM); #endif + lpm_scratch = (struct lpm_scratch_space *)CONFIG_SYS_K3_SCRATCH_LPM_ADDR; + if (lpm_scratch) { + lpm_scratch->wake_src = 0; + lpm_scratch->reserved = 0; + } if ((pmctrl_val & IO_ISO_STATUS) == IO_ISO_STATUS) { + if (lpm_scratch) { + if (IS_ENABLED(CONFIG_SOC_K3_J784S4)) + lpm_scratch->wake_src = K3_LPM_WAKE_SOURCE_MCU_IO; + else + lpm_scratch->wake_src = K3_LPM_WAKE_SOURCE_MAIN_IO; + } clear_isolation(); k3_resuming = K3_RESUME_STATE_RESUMING; debug("board is resuming from IO_DDR mode\n"); @@ -110,6 +132,9 @@ bool j7xx_board_is_resuming(void) if (magic == K3_LPM_MAGIC_SUSPEND) { debug("%s: board is resuming\n", __func__); + if (lpm_scratch) + lpm_scratch->wake_src = K3_LPM_WAKE_SOURCE_PMIC_GPIO; + k3_resuming = K3_RESUME_STATE_RESUMING; /* clean magic suspend */ -- 2.55.0
