Add a fclks_offs field so that fixed clock IDs occupy a declared range, like the fixed factors, muxes and gates already do, and document how the ID ranges of a tree are laid out.
mtk_clk_id_is_fclk() and mtk_clk_id_is_pll() both treat any ID below their table size as theirs, so a tree defining both PLLs and fixed clocks would be ambiguous. Today only the choice of clk_ops tells them apart. Giving fixed clocks an offset removes that dependency, which is needed to share one set of clk_ops between all clock trees. No tree defines fixed clocks at a non-zero ID, so the new field is 0 everywhere and this is no functional change. Signed-off-by: David Lechner <[email protected]> --- drivers/clk/mediatek/clk-mtk.c | 11 ++++++----- drivers/clk/mediatek/clk-mtk.h | 5 +++++ 2 files changed, 11 insertions(+), 5 deletions(-) diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c index 70cc7624a14..78ce206197d 100644 --- a/drivers/clk/mediatek/clk-mtk.c +++ b/drivers/clk/mediatek/clk-mtk.c @@ -155,7 +155,8 @@ static bool mtk_clk_id_is_pll(const struct mtk_clk_tree *tree, int mapped_id) static bool mtk_clk_id_is_fclk(const struct mtk_clk_tree *tree, int mapped_id) { - return tree->fclks && mapped_id < tree->num_fclks; + return tree->fclks && mapped_id >= tree->fclks_offs && + mapped_id < tree->fclks_offs + tree->num_fclks; } static bool mtk_clk_id_is_fdiv(const struct mtk_clk_tree *tree, int mapped_id) @@ -758,7 +759,7 @@ static ulong mtk_topckgen_get_rate(struct clk *clk) const struct mtk_clk_tree *tree = priv->tree; if (mtk_clk_id_is_fclk(tree, clk->id)) - return tree->fclks[clk->id].rate; + return tree->fclks[clk->id - tree->fclks_offs].rate; if (mtk_clk_id_is_fdiv(tree, clk->id)) return mtk_topckgen_get_factor_rate(clk, clk->id - tree->fdivs_offs); @@ -895,8 +896,8 @@ static void mtk_topckgen_dump(struct udevice *dev) const struct mtk_fixed_clk *fclk = &tree->fclks[i]; printf("[FCLK%u] DT: %u", i, fclk->id); - mtk_clk_print_mapped_id(fclk->id, i, tree->id_offs_map); - mtk_clk_print_rate(dev, i); + mtk_clk_print_mapped_id(fclk->id, i + tree->fclks_offs, tree->id_offs_map); + mtk_clk_print_rate(dev, i + tree->fclks_offs); mtk_clk_print_single_parent(fclk->parent, fclk->flags); printf("\n"); } @@ -999,7 +1000,7 @@ static ulong mtk_infrasys_get_rate(struct clk *clk) ulong rate; if (mtk_clk_id_is_fclk(priv->tree, clk->id)) { - rate = priv->tree->fclks[clk->id].rate; + rate = priv->tree->fclks[clk->id - priv->tree->fclks_offs].rate; } else if (mtk_clk_id_is_fdiv(priv->tree, clk->id)) { rate = mtk_infrasys_get_factor_rate(clk, clk->id - priv->tree->fdivs_offs); diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h index e3a7ff75734..1c840d9f6d3 100644 --- a/drivers/clk/mediatek/clk-mtk.h +++ b/drivers/clk/mediatek/clk-mtk.h @@ -254,9 +254,14 @@ struct mtk_clk_tree { * is the index in the various arrays in this struct. The .id and * .parent fields in the various mtk_* structs will contain the * unmapped IDs as defined in the upstream Linux kernel <soc>-clk.h. + * + * PLL IDs always start at 0. The other clock types start at their + * *_offs field, so fixed clocks occupy [fclks_offs, fclks_offs + + * num_fclks) and so on. The ranges of a tree must not overlap. */ const int *id_offs_map; /* optional, maps clk.h ID to array index */ const int id_offs_map_size; + const int fclks_offs; const int fdivs_offs; const int muxes_offs; const int gates_offs; -- 2.43.0
