On Thu, 24 Sep 2026 07:54:12 -0500, David Lechner <[email protected]> wrote: > Change the compatible of the display clock controller from > "mediatek,mt8189-dispsys" to "mediatek,mt8189-mmsys" and rename the node > to syscon@14000000 with the mmsys label. > > The display clock gates live in the mmsys register block at 0x14000000. > The proposed Linux binding for MT8189 adds "mediatek,mt8189-mmsys" to > mediatek,mmsys.yaml, which requires a "syscon@" node name, a "syscon" > fallback and #clock-cells. This follows MT8188 and MT8195, where the > vdosys0 mmsys node is also the display clock provider. The old > "mediatek,mt8189-dispsys" name is not in any upstream binding. > > [...]
Reviewed-by: Julien Stephan <[email protected]> -- Julien Stephan <[email protected]>
