When the probe fails, the driver releases its clock and reset bulks. clk_release_bulk() disables every clock and reset_release_bulk() asserts every reset, and the first entry of each is the SDH AXI bus clock and reset, which all three SDHCI controllers of the K1 share.
One controller failing to probe therefore stops the bus of the others, and the next register access to any of them hangs the hart. On an OrangePi RV2, whose device tree enables the eMMC controller without a max-frequency, the eMMC probe failed in sdhci_setup_cfg() and U-Boot then hung at "MMC:" probing the microSD controller. Keep the clocks running and the resets deasserted on failure. Signed-off-by: Dave Klotz <[email protected]> --- drivers/mmc/spacemit_sdhci.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/spacemit_sdhci.c b/drivers/mmc/spacemit_sdhci.c index fec95e3bd7..c191d78067 100644 --- a/drivers/mmc/spacemit_sdhci.c +++ b/drivers/mmc/spacemit_sdhci.c @@ -640,10 +640,14 @@ static int spacemit_sdhci_probe(struct udevice *dev) spacemit_sdhci_phy_init(dev, host); return 0; + /* + * Leave the clocks and resets alone on failure. The "core" clock and + * the "axi" reset are the AXI clock and reset that every SDHCI + * controller of the K1 shares: releasing them would gate the bus of + * the other controllers, and the next access to one of them hangs. + */ err_reset: - reset_release_bulk(&plat->resets); err_clk: - clk_release_bulk(&plat->clks); return ret; } -- 2.55.0
