On 10/2/26 17:34, Yixun Lan wrote: > Add the default configuration for SpacemiT K3 boards, using the > Pico-ITX device tree as the default. > > Configure U-Boot to run in RISC-V supervisor mode and enable the > platform clock, reset, GPIO, pinctrl, I2C, PMIC and regulator drivers. > Also configure the memory layout, debug UART and basic filesystem > commands required to boot on the platform. > > Signed-off-by: Yixun Lan <[email protected]> > --- > configs/spacemit_k3_defconfig | 51 > +++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 51 insertions(+) > > diff --git a/configs/spacemit_k3_defconfig b/configs/spacemit_k3_defconfig > new file mode 100644 > index 00000000000..a6d1f35a93e > --- /dev/null > +++ b/configs/spacemit_k3_defconfig > @@ -0,0 +1,51 @@ > +CONFIG_RISCV=y > +CONFIG_SYS_MALLOC_LEN=0x1000000 > +CONFIG_SYS_MALLOC_F_LEN=0x80000 > +CONFIG_NR_DRAM_BANKS=2 > +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y > +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x102300000 > +CONFIG_DM_GPIO=y > +CONFIG_DEFAULT_DEVICE_TREE="spacemit/k3-pico-itx" > +CONFIG_SYS_BOOTM_LEN=0xa000000 > +CONFIG_SYS_LOAD_ADDR=0x102000000 > +CONFIG_DEBUG_UART_BASE=0xd4017000 > +CONFIG_DEBUG_UART_CLOCK=14700000 > +CONFIG_TARGET_SPACEMIT_K3=y > +CONFIG_ARCH_RV64I=y > +CONFIG_CMODEL_MEDANY=y > +CONFIG_RISCV_SMODE=y > +CONFIG_RISCV_ISA_ZICBOM=y > +CONFIG_STACK_SIZE=0x100000 > +CONFIG_FIT=y > +CONFIG_SUPPORT_RAW_INITRD=y > +CONFIG_SYS_CBSIZE=256 > +CONFIG_SYS_PBSIZE=276 > +# CONFIG_BOARD_INIT is not set > +CONFIG_HUSH_PARSER=y > +CONFIG_CMD_GPIO=y > +CONFIG_CMD_I2C=y > +CONFIG_CMD_PMIC=y > +CONFIG_CMD_REGULATOR=y > +CONFIG_CMD_FAT=y > +CONFIG_CMD_FS_GENERIC=y > +CONFIG_DEVICE_TREE_INCLUDES="spacemit-k3-u-boot.dtsi" > +CONFIG_SYSCON=y > +CONFIG_CLK_SPACEMIT=y > +CONFIG_CLK_SPACEMIT_K3=y > +CONFIG_SPACEMIT_GPIO=y > +CONFIG_DM_I2C=y > +CONFIG_SYS_I2C_SPACEMIT_K1=y > +CONFIG_MISC=y > +CONFIG_PINCTRL=y > +CONFIG_PINCTRL_SPACEMIT_K1=y > +CONFIG_DM_PMIC=y > +CONFIG_PMIC_SPACEMIT_P1=y > +CONFIG_DM_REGULATOR=y > +CONFIG_DM_REGULATOR_FIXED=y > +CONFIG_DM_REGULATOR_SPACEMIT_P1=y > +CONFIG_DEBUG_UART_NS16550=y > +CONFIG_DEBUG_UART_SHIFT=2 > +CONFIG_DEBUG_UART_ANNOUNCE=y > +CONFIG_SYS_NS16550=y > +CONFIG_SYS_NS16550_MEM32=y > +CONFIG_TIMER_EARLY=y >
Looks good to me for initial support. The interaction of first 32MiB range following 0x102000000 with vendor embedded controller firmware or vendor opensbi or vendor u-boot SPL or possibly mainline opensbi is something I don't understand properly, yet it does not prevent mainline u-boot main payload hush shell operation. Attempting to have an answer for all the moving parts of vendor firmware is too complex to expect for the initial series, this is okay as-is. Reviewed-by: E Shattow <[email protected]>
