Hi Yixun, On October 3 I tested the exact posted v2 2/8 on OrangePi RV2 and R2S as a K1 regression check. Control af2c8f5b7fcc and candidate 649a72433147 differ only by this patch; the working board/DDR/clock support, published EMAC and OpenSBI v1.9 were held fixed.
Both control and candidate builds completed without warnings for both boards, including the SPL clock objects. The new SPL was build-tested only; both boards retained their existing SPL. U-Boot proper was tested on hardware: - RV2: repeated microSD, USB 3 storage and PCIe/NVMe reads; EMAC DHCP, gateway/peer pings and three SHA256-checked 1 MiB TFTP downloads. - R2S: eMMC HS200 repeated reads, USB host enumeration and three SHA256-checked 1 MiB TFTP downloads on both variants; candidate EMAC DHCP and gateway/peer pings passed. Both variants booted FreeBSD with eight CPUs and the expected root, storage and connected links. Independent FreeBSD raw MMC reads matched U-Boot. Both original ESPs were restored with full read-back verification; the existing boot regions remained unchanged throughout. All existing K1 gate definitions remain non-inverted. An extracted-source host register model passed 360 normal/inverted enable/disable checks, including preservation of unrelated register bits. I have no K3 hardware; these results cover K1 regression and the host model, not K3 validation. Tested-by: Dave Klotz <[email protected]>
