On 9/23/26 02:34, Yixun Lan wrote: > This series try to add clock and reset driver support for SpacemiT K3 SoC, > the patches are largely based on upstream linux framework. > > The reset BITs definition lives in the same register with clock > controller which make them tight coupled, so I'm also putting reset > patches in this series. > > Signed-off-by: Yixun Lan <[email protected]> > --- > Changes in v2: > - add complete PLL clock tables > - drop patch for SPL > - Link to v1: > https://patch.msgid.link/[email protected] > > --- > Yixun Lan (8): > clk: spacemit: ccu_mix: fix inverted condition in ccu_mix_trigger_fc() > clk: spacemit: ccu_mix: add inverted enable gate clock > clk: spacemit: ccu_pll: add plla type clock > clk: spacemit: k3: extract common header > clk: spacemit: k3: add the clock tree > clk: spacemit: k3: add CPU PLL rate tables > reset: spacemit: Extract common K1 reset code > reset: spacemit: Add SpacemiT K3 reset driver > > drivers/clk/spacemit/Kconfig | 9 + > drivers/clk/spacemit/Makefile | 1 + > drivers/clk/spacemit/clk-k3.c | 2049 > ++++++++++++++++++++++++ > drivers/clk/spacemit/clk_common.h | 1 + > drivers/clk/spacemit/clk_mix.c | 9 +- > drivers/clk/spacemit/clk_mix.h | 27 +- > drivers/clk/spacemit/clk_pll.c | 124 +- > drivers/clk/spacemit/clk_pll.h | 43 +- > drivers/reset/Kconfig | 1 + > drivers/reset/Makefile | 2 +- > drivers/reset/spacemit/Kconfig | 22 + > drivers/reset/spacemit/Makefile | 4 +- > drivers/reset/spacemit/reset-spacemit-common.c | 93 ++ > drivers/reset/spacemit/reset-spacemit-common.h | 40 + > drivers/reset/spacemit/reset-spacemit-k1.c | 128 +- > drivers/reset/spacemit/reset-spacemit-k3.c | 242 +++ > include/soc/spacemit/k3-reset.h | 21 + > include/soc/spacemit/k3-syscon.h | 271 ++++ > 18 files changed, 2955 insertions(+), 132 deletions(-) > --- > base-commit: a06e89ab05eaa2b8344d521319399333cd760ae5 > change-id: 20260824-01-k3-clock-reset-support-815a0045526a > > Best regards, > -- > Yixun Lan <[email protected]> >
For the series, Acked-by: E Shattow <[email protected]>
