On Wed, 23 Sep 2026 09:34:23 +0000, Yixun Lan wrote: > This series try to add clock and reset driver support for SpacemiT K3 SoC, > the patches are largely based on upstream linux framework. > > The reset BITs definition lives in the same register with clock > controller which make them tight coupled, so I'm also putting reset > patches in this series. > > [...]
Applied, thanks!
[1/8] clk: spacemit: ccu_mix: fix inverted condition in ccu_mix_trigger_fc()
https://git.u-boot-project.org/u-boot/custodians/u-boot-spacemit/-/commit/d1a7fb596ec6717e26e1760c5a3e1adc1294e6fe
[2/8] clk: spacemit: ccu_mix: add inverted enable gate clock
https://git.u-boot-project.org/u-boot/custodians/u-boot-spacemit/-/commit/d2cc0aa2ba32d231a73a10cce7ba332bb565d21d
[3/8] clk: spacemit: ccu_pll: add plla type clock
https://git.u-boot-project.org/u-boot/custodians/u-boot-spacemit/-/commit/57ecf2e5448fb0e6ecc9f3266463f1cc82ee74b9
[4/8] clk: spacemit: k3: extract common header
https://git.u-boot-project.org/u-boot/custodians/u-boot-spacemit/-/commit/c80731fa324700db2c1a5b7725bfbe7ed93d50ef
[5/8] clk: spacemit: k3: add the clock tree
https://git.u-boot-project.org/u-boot/custodians/u-boot-spacemit/-/commit/efe62df16050cd68130e07f209379c38657819d3
[6/8] clk: spacemit: k3: add CPU PLL rate tables
https://git.u-boot-project.org/u-boot/custodians/u-boot-spacemit/-/commit/20c4c8b4099592ce172f6cb78b31cb8d9d68f193
[7/8] reset: spacemit: Extract common K1 reset code
https://git.u-boot-project.org/u-boot/custodians/u-boot-spacemit/-/commit/c2dcfbe319b0e5e77cf4f350531f04c9fa9a7a46
[8/8] reset: spacemit: Add SpacemiT K3 reset driver
https://git.u-boot-project.org/u-boot/custodians/u-boot-spacemit/-/commit/89269413d4f53b77a86946a78a291aab03f7aebd
Best regards,
--
Yixun Lan <[email protected]>
