Hi Alexey, Jonas,
On 8/5/26 9:21 AM, Alexey Charkov wrote:
Hi Jonas,
Thanks a lot for your work on this!
On Tue, Aug 4, 2026 at 4:26 AM Jonas Karlman <[email protected]> wrote:
The ore PLLs are only initialized in SPL on RK3576.
/s/ore/core/ ?
Ensure clock driver is always probed after bind for SPL builds to
initialize core PLLs and clocks in SPL phase on RK3576.
Signed-off-by: Jonas Karlman <[email protected]>
---
drivers/clk/rockchip/clk_rk3576.c | 4 ++++
1 file changed, 4 insertions(+)
Tested it with my 41MB Falcon Linux payload on a Flipper One (RK3576),
and it gives a very noticeable improvement in loading speed: time from
start of BL33 to initramfs goes down from ~20s to ~3s, which is quite
welcome :)
OK but why this improvement? Which clock(s) is responsible for this
speed improvement? This sounds a bit like CPU OPPs without controlling
the regulator and it worries me, but maybe I'm wrong here?
Please help me understand what this actually fixes/helps with and how.
Cheers,
Quentin
