From: Patrick Delaunay <[email protected]>
STM32MP15 does not support the IWDG_SR.ONF bit.
Use IWDG_SR.RVU to detect whether the watchdog is running. This bit is
set while the reload value update is in progress and cleared when the
update completes, but only if the watchdog is running.
Wait until IWDG_SR.RVU is 0. If polling times out, treat the watchdog
as stopped and do not register it in U-Boot.
Fixes: 4bef031d6991 ("watchdog: stm32mp: check the watchdog status")
Signed-off-by: Patrick Delaunay <[email protected]>
Signed-off-by: Antonio Borneo <[email protected]>
---
drivers/watchdog/stm32mp_wdt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/watchdog/stm32mp_wdt.c b/drivers/watchdog/stm32mp_wdt.c
index 0712524b4a8..ecb4117b1ef 100644
--- a/drivers/watchdog/stm32mp_wdt.c
+++ b/drivers/watchdog/stm32mp_wdt.c
@@ -140,7 +140,7 @@ static int stm32mp_wdt_probe(struct udevice *dev)
writel(KR_KEY_EWA, priv->base + IWDG_KR);
rlr = readl(priv->base + IWDG_RLR);
writel(rlr, priv->base + IWDG_RLR);
- ret = readl_poll_timeout(priv->base + IWDG_SR, sr, sr & SR_RVU,
+ ret = readl_poll_timeout(priv->base + IWDG_SR, sr, !(sr &
SR_RVU),
TIMEOUT_US);
if (!ret)
wdt_set_force_autostart(dev);
base-commit: ece349ade2973e220f524ce59e59711cc919263f
--
2.34.1
