Re: [PATCH] arm: dts: socfpga: Add Terasic DE-25 Standard Board Support

[Chee, Tien Fong]

Hi Yuslaimi,

On Thu, 30 Jul 2026 11:02:05 +0800, Alif Zakuan Yuslaimi 
<alif.zakuan.yusla...@altera.com> wrote:

diff --git a/arch/arm/dts/socfpga_agilex5_de25s-u-boot.dtsi 
b/arch/arm/dts/socfpga_agilex5_de25s-u-boot.dtsi
@@ -0,0 +65,6 @@
+        */
+
+       memory {
+               reg = <0x0 0x80000000 0x0 0x40000000>;

Hardcoded 1 GiB DRAM diverges from SoCDK/Nano handoff pattern

Please cite Terasic DE-25 Standard DRAM size evidence, or drop the reg 
override if handoff always fills it

+       };
+

[...]

diff --git a/arch/arm/dts/socfpga_agilex5_de25s-u-boot.dtsi 
b/arch/arm/dts/socfpga_agilex5_de25s-u-boot.dtsi
@@ -0,0 +188,5 @@
+       status = "okay";
+       /* PHY delays is configured via skew properties */
+       phy-mode = "rgmii";
+       phy-handle = <&emac0_phy0>;

PHY mode rgmii vs sibling Nano rgmii-id

Please cite the Terasic Linux DT / board note so reviewers do not treat 
the Nano delta as a miss

+

[...]

diff --git a/arch/arm/dts/socfpga_agilex5_de25s.dts 
b/arch/arm/dts/socfpga_agilex5_de25s.dts
@@ -0,0 +1,3 @@
+// SPDX-License-Identifier:     GPL-2.0
+/*
+ * Copyright (C) 2026 Altera Corporation <www.altera.com>

checkpatch MAINTAINERS warning on new files

Please no hard requirement; optional MAINTAINERS F: lines if matching 
Nano series disposition

[...]

Solid Agilex5 board-add aligned with SoCDK patterns. Confirm hardcoded 1 
GiB DRAM vs handoff and briefly cite Terasic Linux DT for rgmii vs Nano 
rgmii-id.

Best regards,
Tien Fong