The wkup_r5fss0_core0_memory_region was reserved with only
0x0f00000 but the MCU SDK linker for the wkup R5F firmware on
AM62A defines the DM code/data DDR footprint differently:
/* DDR for DM R5F code/data [ size 27 MiB + 364 KB ] */
DDR : ORIGIN = 0x9CAA5000 LENGTH = 0x1B5B000
which results in an end at 0x9e600000. For this memory region which
starts at 0x9c900000 this means a length of:
0x9e600000 - 0x9c900000 = 0x1d00000
AM62A additionally has a second DM firmware for edgeai whose highest
section end address reaches 0x9e700000, so the region should end there:
0x9e700000 - 0x9c900000 = 0x1e00000
Link:
https://github.com/TexasInstruments/mcupsdk-core-k3/blob/k3_main/examples/drivers/ipc/ipc_rpmsg_echo_linux/am62ax-sk/r5fss0-0_freertos/ti-arm-clang/linker.cmd
Fixes: 8dd0ac27fcd1 ("arm64: dts: ti: k3-am62a-phycore-som: Enable
Co-processors")
Acked-by: Andrew Davis <[email protected]>
Reviewed-by: Bryan Brattlof <[email protected]>
Reviewed-by: Kendall Willis <[email protected]>
Signed-off-by: Markus Schneider-Pargmann (TI) <[email protected]>
Reviewed-by: Wadim Egorov <[email protected]>
Link:
https://patch.msgid.link/20260918-topic-am62a-ioddr-dt-v6-19-v9-1-40972ef1f...@baylibre.com
Signed-off-by: Nishanth Menon <[email protected]>
[ upstream commit: 3690b591d07a2e8863eb96e2aff740da47b8de03 ]
(cherry picked from commit 3cc9e9eb606aab57294854bfa440a9eb7c43ea53)
Signed-off-by: Markus Schneider-Pargmann (TI) <[email protected]>
---
dts/upstream/src/arm64/ti/k3-am62a-phycore-som.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/dts/upstream/src/arm64/ti/k3-am62a-phycore-som.dtsi
b/dts/upstream/src/arm64/ti/k3-am62a-phycore-som.dtsi
index de4048a3564b..53c096da68b5 100644
--- a/dts/upstream/src/arm64/ti/k3-am62a-phycore-som.dtsi
+++ b/dts/upstream/src/arm64/ti/k3-am62a-phycore-som.dtsi
@@ -67,7 +67,7 @@
wkup_r5fss0_core0_memory_region: memory@9c900000 {
compatible = "shared-dma-pool";
- reg = <0x00 0x9c900000 0x00 0xf00000>;
+ reg = <0x00 0x9c900000 0x00 0x1e00000>;
no-map;
};
--
2.55.0
