The wkup_r5fss0_core0_memory_region was reserved with
0x01e00000 but the MCU SDK linker for the wkup R5F firmware on
AM62P defines the DM code/data DDR footprint differently:
/* DDR for DM R5F code/data [ size 27 MiB + 396 KB ] */
DDR : ORIGIN = 0x9CAA5000 LENGTH = 0x1B63000
which results in an end at 0x9e608000. For this memory region which
starts at 0x9c900000 this means a length of:
0x9e608000 - 0x9c900000 = 0x1d08000
Link:
https://github.com/TexasInstruments/mcupsdk-core-k3/blob/k3_main/examples/drivers/ipc/ipc_rpmsg_echo_linux/am62px-sk/wkup-r5fss0-0_freertos/ti-arm-clang/linker.cmd
Fixes: 571562e76458 ("arm64: dts: ti: Add support for Variscite VAR-SOM-AM62P")
Reviewed-by: Stefano Radaelli <[email protected]>
Reviewed-by: Bryan Brattlof <[email protected]>
Reviewed-by: Kendall Willis <[email protected]>
Signed-off-by: Markus Schneider-Pargmann (TI) <[email protected]>
Link:
https://patch.msgid.link/20260918-topic-am62a-ioddr-dt-v6-19-v9-6-40972ef1f...@baylibre.com
Signed-off-by: Nishanth Menon <[email protected]>
[ upstream commit: c9b15cd49b3fbd54f3382655b4e898921a7adb4e ]
(cherry picked from commit 8ea59b637d34c19559d5828d83e3df2c32257f12)
Signed-off-by: Markus Schneider-Pargmann (TI) <[email protected]>
---
dts/upstream/src/arm64/ti/k3-am62p5-var-som.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/dts/upstream/src/arm64/ti/k3-am62p5-var-som.dtsi
b/dts/upstream/src/arm64/ti/k3-am62p5-var-som.dtsi
index 8a8dec80cb30..3d1a2c5bc464 100644
--- a/dts/upstream/src/arm64/ti/k3-am62p5-var-som.dtsi
+++ b/dts/upstream/src/arm64/ti/k3-am62p5-var-som.dtsi
@@ -71,7 +71,7 @@
wkup_r5fss0_core0_memory_region: r5f-memory@9c900000 {
compatible = "shared-dma-pool";
- reg = <0x00 0x9c900000 0x00 0x01e00000>;
+ reg = <0x00 0x9c900000 0x00 0x01d08000>;
no-map;
};
--
2.55.0
